Lines Matching refs:XMM_L
3233 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(0))); in gen_sse()
3235 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(1))); in gen_sse()
3236 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(2))); in gen_sse()
3237 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(3))); in gen_sse()
3240 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)), in gen_sse()
3241 offsetof(CPUX86State,xmm_regs[rm].XMM_L(0))); in gen_sse()
3249 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(2))); in gen_sse()
3250 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(3))); in gen_sse()
3275 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)), in gen_sse()
3276 offsetof(CPUX86State,xmm_regs[rm].XMM_L(0))); in gen_sse()
3277 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)), in gen_sse()
3278 offsetof(CPUX86State,xmm_regs[rm].XMM_L(2))); in gen_sse()
3280 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(1)), in gen_sse()
3281 offsetof(CPUX86State,xmm_regs[reg].XMM_L(0))); in gen_sse()
3282 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)), in gen_sse()
3283 offsetof(CPUX86State,xmm_regs[reg].XMM_L(2))); in gen_sse()
3315 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(1)), in gen_sse()
3316 offsetof(CPUX86State,xmm_regs[rm].XMM_L(1))); in gen_sse()
3317 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)), in gen_sse()
3318 offsetof(CPUX86State,xmm_regs[rm].XMM_L(3))); in gen_sse()
3320 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)), in gen_sse()
3321 offsetof(CPUX86State,xmm_regs[reg].XMM_L(1))); in gen_sse()
3322 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)), in gen_sse()
3323 offsetof(CPUX86State,xmm_regs[reg].XMM_L(3))); in gen_sse()
3349 offsetof(CPUX86State,xmm_regs[reg].XMM_L(0))); in gen_sse()
3392 tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(0))); in gen_sse()
3396 gen_op_movl(offsetof(CPUX86State,xmm_regs[rm].XMM_L(0)), in gen_sse()
3397 offsetof(CPUX86State,xmm_regs[reg].XMM_L(0))); in gen_sse()
3437 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0))); in gen_sse()
3439 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(1))); in gen_sse()
3558 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0))); in gen_sse()
3688 offsetof(XMMReg, XMM_L(0))); in gen_sse()
3797 xmm_regs[reg].XMM_L(val & 3))); in gen_sse()
3821 xmm_regs[reg].XMM_L(val & 3))); in gen_sse()
3841 .XMM_L((val >> 6) & 3))); in gen_sse()
3849 .XMM_L((val >> 4) & 3))); in gen_sse()
3853 xmm_regs[reg].XMM_L(0))); in gen_sse()
3857 xmm_regs[reg].XMM_L(1))); in gen_sse()
3861 xmm_regs[reg].XMM_L(2))); in gen_sse()
3865 xmm_regs[reg].XMM_L(3))); in gen_sse()
3877 xmm_regs[reg].XMM_L(val & 3))); in gen_sse()
3955 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0))); in gen_sse()