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Searched defs:PredReg (Results 1 – 12 of 12) sorted by relevance

/external/llvm/lib/Target/ARM/
DThumb2InstrInfo.cpp60 unsigned PredReg = 0; in ReplaceTailWithBranchTo() local
108 unsigned PredReg = 0; in isLegalToSplitMBBAt() local
180 ARMCC::CondCodes Pred, unsigned PredReg, in emitT2RegPlusImmediate()
403 unsigned PredReg; in rewriteT2FrameIndex() local
575 unsigned PredReg = 0; in scheduleTwoAddrSource() local
609 llvm::getITInstrPredicate(const MachineInstr *MI, unsigned &PredReg) { in getITInstrPredicate()
DThumb2RegisterInfo.cpp40 ARMCC::CondCodes Pred, unsigned PredReg, in emitLoadConstPool()
DARMLoadStoreOptimizer.cpp286 unsigned PredReg, unsigned Scratch, DebugLoc dl, in MergeOps()
371 ARMCC::CondCodes Pred, unsigned PredReg, in MergeOpsUpdate()
448 ARMCC::CondCodes Pred, unsigned PredReg, in MergeLDR_STR()
533 ARMCC::CondCodes Pred, unsigned PredReg) { in isMatchingDecrement()
566 ARMCC::CondCodes Pred, unsigned PredReg) { in isMatchingIncrement()
720 unsigned PredReg = 0; in MergeBaseUpdateLSMultiple() local
873 unsigned PredReg = 0; in MergeBaseUpdateLoadStore() local
1081 ARMCC::CondCodes Pred, unsigned PredReg, in InsertLDR_STR()
1131 unsigned PredReg = 0; in FixInvalidRegPairOp() local
1253 unsigned PredReg = 0; in LoadStoreMultipleOpti() local
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DARMBaseRegisterInfo.cpp695 unsigned PredReg, unsigned MIFlags) const { in emitLoadConstPool()
729 ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0) { in emitSPUpdate()
769 unsigned PredReg = Old->getOperand(2).getReg(); in eliminateCallFramePseudoInstr() local
773 unsigned PredReg = Old->getOperand(3).getReg(); in eliminateCallFramePseudoInstr() local
1108 unsigned PredReg = (PIdx == -1) ? 0 : MI.getOperand(PIdx+1).getReg(); in eliminateFrameIndex() local
DThumb2SizeReduction.cpp543 unsigned PredReg = 0; in ReduceSpecial() local
642 unsigned PredReg = 0; in ReduceTo2Addr() local
734 unsigned PredReg = 0; in ReduceToNarrow() local
DThumb2ITBlockPass.cpp173 unsigned PredReg = 0; in InsertITInstructions() local
DThumb1RegisterInfo.cpp69 ARMCC::CondCodes Pred, unsigned PredReg, in emitLoadConstPool()
412 unsigned PredReg; in rewriteFrameIndex() local
DMLxExpansionPass.cpp219 unsigned PredReg = MI->getOperand(++NextOp).getReg(); in ExpandFPMLxInstruction() local
DARMBaseInstrInfo.cpp1480 llvm::getInstrPredicate(const MachineInstr *MI, unsigned &PredReg) { in getInstrPredicate()
1510 unsigned PredReg = 0; in commuteInstruction() local
1580 ARMCC::CondCodes Pred, unsigned PredReg, in emitARMRegPlusImmediate()
DARMISelDAGToDAG.cpp2599 SDValue PredReg = CurDAG->getRegister(0, MVT::i32); in Select() local
2836 SDValue PredReg = CurDAG->getRegister(0, MVT::i32); in Select() local
2856 SDValue PredReg = CurDAG->getRegister(0, MVT::i32); in Select() local
2875 SDValue PredReg = CurDAG->getRegister(0, MVT::i32); in Select() local
DARMExpandPseudoInsts.cpp614 unsigned PredReg = 0; in ExpandMOV32BitImm() local
DARMConstantIslandPass.cpp1371 unsigned PredReg = 0; in createNewWater() local
1818 unsigned PredReg = 0; in optimizeThumb2Branches() local