Searched defs:PredReg (Results 1 – 12 of 12) sorted by relevance
/external/llvm/lib/Target/ARM/ |
D | Thumb2InstrInfo.cpp | 60 unsigned PredReg = 0; in ReplaceTailWithBranchTo() local 108 unsigned PredReg = 0; in isLegalToSplitMBBAt() local 180 ARMCC::CondCodes Pred, unsigned PredReg, in emitT2RegPlusImmediate() 403 unsigned PredReg; in rewriteT2FrameIndex() local 575 unsigned PredReg = 0; in scheduleTwoAddrSource() local 609 llvm::getITInstrPredicate(const MachineInstr *MI, unsigned &PredReg) { in getITInstrPredicate()
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D | Thumb2RegisterInfo.cpp | 40 ARMCC::CondCodes Pred, unsigned PredReg, in emitLoadConstPool()
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D | ARMLoadStoreOptimizer.cpp | 286 unsigned PredReg, unsigned Scratch, DebugLoc dl, in MergeOps() 371 ARMCC::CondCodes Pred, unsigned PredReg, in MergeOpsUpdate() 448 ARMCC::CondCodes Pred, unsigned PredReg, in MergeLDR_STR() 533 ARMCC::CondCodes Pred, unsigned PredReg) { in isMatchingDecrement() 566 ARMCC::CondCodes Pred, unsigned PredReg) { in isMatchingIncrement() 720 unsigned PredReg = 0; in MergeBaseUpdateLSMultiple() local 873 unsigned PredReg = 0; in MergeBaseUpdateLoadStore() local 1081 ARMCC::CondCodes Pred, unsigned PredReg, in InsertLDR_STR() 1131 unsigned PredReg = 0; in FixInvalidRegPairOp() local 1253 unsigned PredReg = 0; in LoadStoreMultipleOpti() local [all …]
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D | ARMBaseRegisterInfo.cpp | 695 unsigned PredReg, unsigned MIFlags) const { in emitLoadConstPool() 729 ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0) { in emitSPUpdate() 769 unsigned PredReg = Old->getOperand(2).getReg(); in eliminateCallFramePseudoInstr() local 773 unsigned PredReg = Old->getOperand(3).getReg(); in eliminateCallFramePseudoInstr() local 1108 unsigned PredReg = (PIdx == -1) ? 0 : MI.getOperand(PIdx+1).getReg(); in eliminateFrameIndex() local
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D | Thumb2SizeReduction.cpp | 543 unsigned PredReg = 0; in ReduceSpecial() local 642 unsigned PredReg = 0; in ReduceTo2Addr() local 734 unsigned PredReg = 0; in ReduceToNarrow() local
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D | Thumb2ITBlockPass.cpp | 173 unsigned PredReg = 0; in InsertITInstructions() local
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D | Thumb1RegisterInfo.cpp | 69 ARMCC::CondCodes Pred, unsigned PredReg, in emitLoadConstPool() 412 unsigned PredReg; in rewriteFrameIndex() local
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D | MLxExpansionPass.cpp | 219 unsigned PredReg = MI->getOperand(++NextOp).getReg(); in ExpandFPMLxInstruction() local
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D | ARMBaseInstrInfo.cpp | 1480 llvm::getInstrPredicate(const MachineInstr *MI, unsigned &PredReg) { in getInstrPredicate() 1510 unsigned PredReg = 0; in commuteInstruction() local 1580 ARMCC::CondCodes Pred, unsigned PredReg, in emitARMRegPlusImmediate()
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D | ARMISelDAGToDAG.cpp | 2599 SDValue PredReg = CurDAG->getRegister(0, MVT::i32); in Select() local 2836 SDValue PredReg = CurDAG->getRegister(0, MVT::i32); in Select() local 2856 SDValue PredReg = CurDAG->getRegister(0, MVT::i32); in Select() local 2875 SDValue PredReg = CurDAG->getRegister(0, MVT::i32); in Select() local
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D | ARMExpandPseudoInsts.cpp | 614 unsigned PredReg = 0; in ExpandMOV32BitImm() local
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D | ARMConstantIslandPass.cpp | 1371 unsigned PredReg = 0; in createNewWater() local 1818 unsigned PredReg = 0; in optimizeThumb2Branches() local
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