1 //===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file exposes a function named BuildMI, which is useful for dramatically
11 // simplifying how MachineInstr's are created. It allows use of code like this:
12 //
13 // M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
14 //
15 //===----------------------------------------------------------------------===//
16
17 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
18 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
19
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/Support/ErrorHandling.h"
22
23 namespace llvm {
24
25 class MCInstrDesc;
26 class MDNode;
27
28 namespace RegState {
29 enum {
30 Define = 0x2,
31 Implicit = 0x4,
32 Kill = 0x8,
33 Dead = 0x10,
34 Undef = 0x20,
35 EarlyClobber = 0x40,
36 Debug = 0x80,
37 DefineNoRead = Define | Undef,
38 ImplicitDefine = Implicit | Define,
39 ImplicitKill = Implicit | Kill
40 };
41 }
42
43 class MachineInstrBuilder {
44 MachineInstr *MI;
45 public:
MachineInstrBuilder()46 MachineInstrBuilder() : MI(0) {}
MachineInstrBuilder(MachineInstr * mi)47 explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
48
49 /// Allow automatic conversion to the machine instruction we are working on.
50 ///
51 operator MachineInstr*() const { return MI; }
52 MachineInstr *operator->() const { return MI; }
iterator()53 operator MachineBasicBlock::iterator() const { return MI; }
54
55 /// addReg - Add a new virtual register operand...
56 ///
57 const
58 MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
59 unsigned SubReg = 0) const {
60 assert((flags & 0x1) == 0 &&
61 "Passing in 'true' to addReg is forbidden! Use enums instead.");
62 MI->addOperand(MachineOperand::CreateReg(RegNo,
63 flags & RegState::Define,
64 flags & RegState::Implicit,
65 flags & RegState::Kill,
66 flags & RegState::Dead,
67 flags & RegState::Undef,
68 flags & RegState::EarlyClobber,
69 SubReg,
70 flags & RegState::Debug));
71 return *this;
72 }
73
74 /// addImm - Add a new immediate operand.
75 ///
addImm(int64_t Val)76 const MachineInstrBuilder &addImm(int64_t Val) const {
77 MI->addOperand(MachineOperand::CreateImm(Val));
78 return *this;
79 }
80
addCImm(const ConstantInt * Val)81 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
82 MI->addOperand(MachineOperand::CreateCImm(Val));
83 return *this;
84 }
85
addFPImm(const ConstantFP * Val)86 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
87 MI->addOperand(MachineOperand::CreateFPImm(Val));
88 return *this;
89 }
90
91 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
92 unsigned char TargetFlags = 0) const {
93 MI->addOperand(MachineOperand::CreateMBB(MBB, TargetFlags));
94 return *this;
95 }
96
addFrameIndex(int Idx)97 const MachineInstrBuilder &addFrameIndex(int Idx) const {
98 MI->addOperand(MachineOperand::CreateFI(Idx));
99 return *this;
100 }
101
102 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
103 int Offset = 0,
104 unsigned char TargetFlags = 0) const {
105 MI->addOperand(MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
106 return *this;
107 }
108
109 const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
110 unsigned char TargetFlags = 0) const {
111 MI->addOperand(MachineOperand::CreateJTI(Idx, TargetFlags));
112 return *this;
113 }
114
115 const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
116 int64_t Offset = 0,
117 unsigned char TargetFlags = 0) const {
118 MI->addOperand(MachineOperand::CreateGA(GV, Offset, TargetFlags));
119 return *this;
120 }
121
122 const MachineInstrBuilder &addExternalSymbol(const char *FnName,
123 unsigned char TargetFlags = 0) const {
124 MI->addOperand(MachineOperand::CreateES(FnName, TargetFlags));
125 return *this;
126 }
127
addRegMask(const uint32_t * Mask)128 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
129 MI->addOperand(MachineOperand::CreateRegMask(Mask));
130 return *this;
131 }
132
addMemOperand(MachineMemOperand * MMO)133 const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
134 MI->addMemOperand(*MI->getParent()->getParent(), MMO);
135 return *this;
136 }
137
setMemRefs(MachineInstr::mmo_iterator b,MachineInstr::mmo_iterator e)138 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b,
139 MachineInstr::mmo_iterator e) const {
140 MI->setMemRefs(b, e);
141 return *this;
142 }
143
144
addOperand(const MachineOperand & MO)145 const MachineInstrBuilder &addOperand(const MachineOperand &MO) const {
146 MI->addOperand(MO);
147 return *this;
148 }
149
addMetadata(const MDNode * MD)150 const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
151 MI->addOperand(MachineOperand::CreateMetadata(MD));
152 return *this;
153 }
154
addSym(MCSymbol * Sym)155 const MachineInstrBuilder &addSym(MCSymbol *Sym) const {
156 MI->addOperand(MachineOperand::CreateMCSymbol(Sym));
157 return *this;
158 }
159
setMIFlags(unsigned Flags)160 const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
161 MI->setFlags(Flags);
162 return *this;
163 }
164
setMIFlag(MachineInstr::MIFlag Flag)165 const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
166 MI->setFlag(Flag);
167 return *this;
168 }
169
170 // Add a displacement from an existing MachineOperand with an added offset.
addDisp(const MachineOperand & Disp,int64_t off)171 const MachineInstrBuilder &addDisp(const MachineOperand &Disp,
172 int64_t off) const {
173 switch (Disp.getType()) {
174 default:
175 llvm_unreachable("Unhandled operand type in addDisp()");
176 case MachineOperand::MO_Immediate:
177 return addImm(Disp.getImm() + off);
178 case MachineOperand::MO_GlobalAddress:
179 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off);
180 }
181 }
182 };
183
184 /// BuildMI - Builder interface. Specify how to create the initial instruction
185 /// itself.
186 ///
BuildMI(MachineFunction & MF,DebugLoc DL,const MCInstrDesc & MCID)187 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
188 DebugLoc DL,
189 const MCInstrDesc &MCID) {
190 return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL));
191 }
192
193 /// BuildMI - This version of the builder sets up the first operand as a
194 /// destination virtual register.
195 ///
BuildMI(MachineFunction & MF,DebugLoc DL,const MCInstrDesc & MCID,unsigned DestReg)196 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
197 DebugLoc DL,
198 const MCInstrDesc &MCID,
199 unsigned DestReg) {
200 return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL))
201 .addReg(DestReg, RegState::Define);
202 }
203
204 /// BuildMI - This version of the builder inserts the newly-built
205 /// instruction before the given position in the given MachineBasicBlock, and
206 /// sets up the first operand as a destination virtual register.
207 ///
BuildMI(MachineBasicBlock & BB,MachineBasicBlock::iterator I,DebugLoc DL,const MCInstrDesc & MCID,unsigned DestReg)208 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
209 MachineBasicBlock::iterator I,
210 DebugLoc DL,
211 const MCInstrDesc &MCID,
212 unsigned DestReg) {
213 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
214 BB.insert(I, MI);
215 return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
216 }
217
BuildMI(MachineBasicBlock & BB,MachineBasicBlock::instr_iterator I,DebugLoc DL,const MCInstrDesc & MCID,unsigned DestReg)218 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
219 MachineBasicBlock::instr_iterator I,
220 DebugLoc DL,
221 const MCInstrDesc &MCID,
222 unsigned DestReg) {
223 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
224 BB.insert(I, MI);
225 return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
226 }
227
BuildMI(MachineBasicBlock & BB,MachineInstr * I,DebugLoc DL,const MCInstrDesc & MCID,unsigned DestReg)228 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
229 MachineInstr *I,
230 DebugLoc DL,
231 const MCInstrDesc &MCID,
232 unsigned DestReg) {
233 if (I->isInsideBundle()) {
234 MachineBasicBlock::instr_iterator MII = I;
235 return BuildMI(BB, MII, DL, MCID, DestReg);
236 }
237
238 MachineBasicBlock::iterator MII = I;
239 return BuildMI(BB, MII, DL, MCID, DestReg);
240 }
241
242 /// BuildMI - This version of the builder inserts the newly-built
243 /// instruction before the given position in the given MachineBasicBlock, and
244 /// does NOT take a destination register.
245 ///
BuildMI(MachineBasicBlock & BB,MachineBasicBlock::iterator I,DebugLoc DL,const MCInstrDesc & MCID)246 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
247 MachineBasicBlock::iterator I,
248 DebugLoc DL,
249 const MCInstrDesc &MCID) {
250 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
251 BB.insert(I, MI);
252 return MachineInstrBuilder(MI);
253 }
254
BuildMI(MachineBasicBlock & BB,MachineBasicBlock::instr_iterator I,DebugLoc DL,const MCInstrDesc & MCID)255 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
256 MachineBasicBlock::instr_iterator I,
257 DebugLoc DL,
258 const MCInstrDesc &MCID) {
259 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
260 BB.insert(I, MI);
261 return MachineInstrBuilder(MI);
262 }
263
BuildMI(MachineBasicBlock & BB,MachineInstr * I,DebugLoc DL,const MCInstrDesc & MCID)264 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
265 MachineInstr *I,
266 DebugLoc DL,
267 const MCInstrDesc &MCID) {
268 if (I->isInsideBundle()) {
269 MachineBasicBlock::instr_iterator MII = I;
270 return BuildMI(BB, MII, DL, MCID);
271 }
272
273 MachineBasicBlock::iterator MII = I;
274 return BuildMI(BB, MII, DL, MCID);
275 }
276
277 /// BuildMI - This version of the builder inserts the newly-built
278 /// instruction at the end of the given MachineBasicBlock, and does NOT take a
279 /// destination register.
280 ///
BuildMI(MachineBasicBlock * BB,DebugLoc DL,const MCInstrDesc & MCID)281 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
282 DebugLoc DL,
283 const MCInstrDesc &MCID) {
284 return BuildMI(*BB, BB->end(), DL, MCID);
285 }
286
287 /// BuildMI - This version of the builder inserts the newly-built
288 /// instruction at the end of the given MachineBasicBlock, and sets up the first
289 /// operand as a destination virtual register.
290 ///
BuildMI(MachineBasicBlock * BB,DebugLoc DL,const MCInstrDesc & MCID,unsigned DestReg)291 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
292 DebugLoc DL,
293 const MCInstrDesc &MCID,
294 unsigned DestReg) {
295 return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
296 }
297
getDefRegState(bool B)298 inline unsigned getDefRegState(bool B) {
299 return B ? RegState::Define : 0;
300 }
getImplRegState(bool B)301 inline unsigned getImplRegState(bool B) {
302 return B ? RegState::Implicit : 0;
303 }
getKillRegState(bool B)304 inline unsigned getKillRegState(bool B) {
305 return B ? RegState::Kill : 0;
306 }
getDeadRegState(bool B)307 inline unsigned getDeadRegState(bool B) {
308 return B ? RegState::Dead : 0;
309 }
getUndefRegState(bool B)310 inline unsigned getUndefRegState(bool B) {
311 return B ? RegState::Undef : 0;
312 }
313
314 } // End llvm namespace
315
316 #endif
317