Searched refs:FETCH (Results 1 – 25 of 165) sorted by relevance
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| /dalvik/vm/mterp/c/ |
| D | OP_CONST_WIDE.cpp | 6 tmp = FETCH(1); in HANDLE_OPCODE()
7 tmp |= (u8)FETCH(2) << 16; in HANDLE_OPCODE()
8 tmp |= (u8)FETCH(3) << 32; in HANDLE_OPCODE()
9 tmp |= (u8)FETCH(4) << 48; in HANDLE_OPCODE()
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| D | OP_MOVE_WIDE_16.cpp | 2 vdst = FETCH(1);
3 vsrc1 = FETCH(2);
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| D | OP_CONST.cpp | 6 tmp = FETCH(1); in HANDLE_OPCODE()
7 tmp |= (u4)FETCH(2) << 16; in HANDLE_OPCODE()
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| D | OP_GOTO_32.cpp | 3 s4 offset = FETCH(1); /* low-order 16 bits */ in HANDLE_OPCODE()
4 offset |= ((s4) FETCH(2)) << 16; /* high-order 16 bits */ in HANDLE_OPCODE()
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| D | OP_CONST_WIDE_32.cpp | 6 tmp = FETCH(1); in HANDLE_OPCODE()
7 tmp |= (u4)FETCH(2) << 16; in HANDLE_OPCODE()
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| D | OP_MOVE_16.cpp | 2 vdst = FETCH(1);
3 vsrc1 = FETCH(2);
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| D | OP_CONST_STRING_JUMBO.cpp | 7 tmp = FETCH(1); in HANDLE_OPCODE()
8 tmp |= (u4)FETCH(2) << 16; in HANDLE_OPCODE()
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| D | OP_FILL_ARRAY_DATA.cpp | 9 offset = FETCH(1) | (((s4) FETCH(2)) << 16); in HANDLE_OPCODE()
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| D | OP_SPARSE_SWITCH.cpp | 8 offset = FETCH(1) | (((s4) FETCH(2)) << 16); in HANDLE_OPCODE()
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| D | OP_PACKED_SWITCH.cpp | 8 offset = FETCH(1) | (((s4) FETCH(2)) << 16); in HANDLE_OPCODE()
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| D | OP_EXECUTE_INLINE.cpp | 25 ref = FETCH(1); /* inline call "ref" */ in HANDLE_OPCODE()
26 vdst = FETCH(2); /* 0-4 register indices */ in HANDLE_OPCODE()
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| D | OP_EXECUTE_INLINE_RANGE.cpp | 9 ref = FETCH(1); /* inline call "ref" */ in HANDLE_OPCODE()
10 vdst = FETCH(2); /* range base */ in HANDLE_OPCODE()
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| /dalvik/vm/mterp/x86-atom/ |
| D | OP_CONST_WIDE.S | 31 FETCH 1, %ecx # %ecx<- BBBBlolo
32 FETCH 2, %edx # %edx<- BBBBlohi
36 FETCH 3, %ecx # %ecx<- BBBBhilo
37 FETCH 4, %edx # %edx<- BBBBhihi
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| D | OP_MOVE_16.S | 31 FETCH 2, %edx # %edx<- BBBB
32 FETCH 1, %ecx # %ecx<- AAAA
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| D | OP_MOVE_WIDE_16.S | 31 FETCH 2, %edx # %edx<- BBBB
32 FETCH 1, %ecx # %ecx<- AAAA
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| D | OP_GOTO_32.S | 31 FETCH 1, %edx # %edx<- AAAAlo
32 FETCH 2, %ecx # %ecx<- AAAAhi
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| D | OP_CONST.S | 30 FETCH 2, %edx # %edx<- BBBBhi
31 FETCH 1, %ecx # %ecx<- BBBBlo
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| D | OP_INVOKE_VIRTUAL_QUICK.S | 26 FETCH 2, %edx # %edx<- GFED or CCCC
30 FETCH 1, %ecx # %ecx<- method index
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| D | OP_FILL_ARRAY_DATA.S | 32 FETCH 1, %ecx # %ecx<- BBBBlo
33 FETCH 2, %edx # %edx<- BBBBhi
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| /dalvik/vm/mterp/armv5te/ |
| D | OP_CONST_WIDE.S | 3 FETCH(r0, 1) @ r0<- bbbb (low)
4 FETCH(r1, 2) @ r1<- BBBB (low middle)
5 FETCH(r2, 3) @ r2<- hhhh (high middle)
7 FETCH(r3, 4) @ r3<- HHHH (high)
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| D | OP_MOVE_16.S | 4 FETCH(r1, 2) @ r1<- BBBB
5 FETCH(r0, 1) @ r0<- AAAA
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| D | OP_CONST.S | 4 FETCH(r0, 1) @ r0<- bbbb (low)
5 FETCH(r1, 2) @ r1<- BBBB (high)
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| D | OP_MOVE_WIDE_16.S | 4 FETCH(r3, 2) @ r3<- BBBB
5 FETCH(r2, 1) @ r2<- AAAA
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| /dalvik/vm/mterp/out/ |
| D | InterpC-allstubs.cpp | 269 #define FETCH(_offset) (pc[(_offset)]) macro
383 u2 inst = FETCH(0); \
430 u2 inst = FETCH(0); \
584 regs = FETCH(1); \
608 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
624 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
648 srcRegs = FETCH(1); \
683 srcRegs = FETCH(1); \
696 vsrc2 = FETCH(1); \
728 litInfo = FETCH(1); \
[all …]
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| D | InterpC-portable.cpp | 269 #define FETCH(_offset) (pc[(_offset)]) macro
409 inst = FETCH(0); \
532 regs = FETCH(1); \
556 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
572 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
596 srcRegs = FETCH(1); \
631 srcRegs = FETCH(1); \
644 vsrc2 = FETCH(1); \
676 litInfo = FETCH(1); \
710 litInfo = FETCH(1); \
[all …]
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