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/external/clang/test/Index/
Dindex-many-logical-ops.c8 int foo(int x) { in foo() argument
10 x && in foo()
11 x && in foo()
12 x && in foo()
13 x && in foo()
14 x && in foo()
15 x && in foo()
16 x && in foo()
17 x && in foo()
18 x && in foo()
[all …]
/external/clang/test/Sema/
Dmany-logical-ops.c7 int foo(int x) { in foo() argument
9 x && in foo()
10 x && in foo()
11 x && in foo()
12 x && in foo()
13 x && in foo()
14 x && in foo()
15 x && in foo()
16 x && in foo()
17 x && in foo()
[all …]
/external/clang/test/CodeGenCXX/
Dvtable-debug-info.cpp14 #define x(a) virtual void v ## a (void) macro
15 x(1);
16 x(2);
17 x(3);
18 x(4);
19 x(5);
20 x(6);
21 x(7);
22 x(8);
23 x(9);
[all …]
/external/v8/test/mjsunit/
Dnumops-fuzz.js29 var x = 0;
31 assertEquals(0, x /= (tmp = 798469700.4090232, tmp));
32 assertEquals(0, x *= (2714102322.365509));
33 assertEquals(0, x *= x);
34 assertEquals(139516372, x -= (tmp = -139516372, tmp));
35 assertEquals(1, x /= (x%(2620399703.344006)));
36 assertEquals(0, x >>>= x);
37 assertEquals(-2772151192.8633175, x -= (tmp = 2772151192.8633175, tmp));
38 assertEquals(-2786298206.8633175, x -= (14147014));
39 assertEquals(1509750523, x |= ((1073767916)-(tmp = 919311632.2789925, tmp)));
[all …]
/external/llvm/test/CodeGen/X86/
D2008-07-19-movups-spills.ll8 external global <4 x float>, align 1 ; <<4 x float>*>:0 [#uses=2]
9 external global <4 x float>, align 1 ; <<4 x float>*>:1 [#uses=1]
10 external global <4 x float>, align 1 ; <<4 x float>*>:2 [#uses=1]
11 external global <4 x float>, align 1 ; <<4 x float>*>:3 [#uses=1]
12 external global <4 x float>, align 1 ; <<4 x float>*>:4 [#uses=1]
13 external global <4 x float>, align 1 ; <<4 x float>*>:5 [#uses=1]
14 external global <4 x float>, align 1 ; <<4 x float>*>:6 [#uses=1]
15 external global <4 x float>, align 1 ; <<4 x float>*>:7 [#uses=1]
16 external global <4 x float>, align 1 ; <<4 x float>*>:8 [#uses=1]
17 external global <4 x float>, align 1 ; <<4 x float>*>:9 [#uses=1]
[all …]
Dmem-promote-integers.ll7 define <1 x i8> @test_1xi8(<1 x i8> %x, <1 x i8>* %b) {
8 %bb = load <1 x i8>* %b
9 %tt = xor <1 x i8> %x, %bb
10 store <1 x i8> %tt, <1 x i8>* %b
14 ret <1 x i8> %tt
18 define <1 x i16> @test_1xi16(<1 x i16> %x, <1 x i16>* %b) {
19 %bb = load <1 x i16>* %b
20 %tt = xor <1 x i16> %x, %bb
21 store <1 x i16> %tt, <1 x i16>* %b
25 ret <1 x i16> %tt
[all …]
Dxop-intrinsics-x86_64.ll3 define <2 x double> @test_int_x86_xop_vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %…
5 …%res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double>…
6 ret <2 x double> %res
8 define <2 x double> @test_int_x86_xop_vpermil2pd_mr(<2 x double> %a0, <2 x double>* %a1, <2 x doubl…
11 %vec = load <2 x double>* %a1
12 …%res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %vec, <2 x double…
13 ret <2 x double> %res
15 define <2 x double> @test_int_x86_xop_vpermil2pd_rm(<2 x double> %a0, <2 x double> %a1, <2 x double…
18 %vec = load <2 x double>* %a2
19 …%res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double>…
[all …]
Dfma4-intrinsics-x86_64.ll4 define < 4 x float > @test_x86_fma4_vfmadd_ss(< 4 x float > %a0, < 4 x float > %a1, < 4 x float > %…
6 …%res = call < 4 x float > @llvm.x86.fma4.vfmadd.ss(< 4 x float > %a0, < 4 x float > %a1, < 4 x flo…
7 ret < 4 x float > %res
9 define < 4 x float > @test_x86_fma4_vfmadd_ss_load(< 4 x float > %a0, < 4 x float > %a1, float* %a2…
11 %x = load float *%a2
12 %y = insertelement <4 x float> undef, float %x, i32 0
13 …%res = call < 4 x float > @llvm.x86.fma4.vfmadd.ss(< 4 x float > %a0, < 4 x float > %a1, < 4 x flo…
14 ret < 4 x float > %res
16 define < 4 x float > @test_x86_fma4_vfmadd_ss_load2(< 4 x float > %a0, float* %a1, < 4 x float > %a…
18 %x = load float *%a1
[all …]
Davx2-intrinsics-x86.ll3 define <16 x i16> @test_x86_avx2_packssdw(<8 x i32> %a0, <8 x i32> %a1) {
5 …%res = call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> %a0, <8 x i32> %a1) ; <<16 x i16>> [#uses…
6 ret <16 x i16> %res
8 declare <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32>, <8 x i32>) nounwind readnone
11 define <32 x i8> @test_x86_avx2_packsswb(<16 x i16> %a0, <16 x i16> %a1) {
13 …%res = call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses…
14 ret <32 x i8> %res
16 declare <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16>, <16 x i16>) nounwind readnone
19 define <32 x i8> @test_x86_avx2_packuswb(<16 x i16> %a0, <16 x i16> %a1) {
21 …%res = call <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses…
[all …]
D2007-04-24-VectorCrash.ll5 declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>)
9x i32> zeroinitializer, and (<4 x i32> bitcast (<4 x float> shufflevector (<4 x float> undef, <4 x
10 bitcast <4 x i32> %0 to <4 x float> ; <<4 x float>>:1 [#uses=1]
11 fsub <4 x float> %1, zeroinitializer ; <<4 x float>>:2 [#uses=1]
12 …fsub <4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer), …
13 …shufflevector <4 x float> zeroinitializer, <4 x float> %3, <4 x i32> < i32 0, i32 5, i32 6, i32 7 …
14 …shufflevector <4 x float> zeroinitializer, <4 x float> %4, <4 x i32> < i32 0, i32 5, i32 6, i32 7 …
15 …shufflevector <4 x float> zeroinitializer, <4 x float> %5, <4 x i32> < i32 0, i32 1, i32 2, i32 7 …
16 …shufflevector <4 x float> %6, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 …
17 …shufflevector <4 x float> %7, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 …
[all …]
Dhaddsub.ll9 define <2 x double> @haddpd1(<2 x double> %x, <2 x double> %y) {
10 %a = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> <i32 0, i32 2>
11 %b = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> <i32 1, i32 3>
12 %r = fadd <2 x double> %a, %b
13 ret <2 x double> %r
21 define <2 x double> @haddpd2(<2 x double> %x, <2 x double> %y) {
22 %a = shufflevector <2 x double> %x, <2 x double> %y, <2 x i32> <i32 1, i32 2>
23 %b = shufflevector <2 x double> %y, <2 x double> %x, <2 x i32> <i32 2, i32 1>
24 %r = fadd <2 x double> %a, %b
25 ret <2 x double> %r
[all …]
Davx-intrinsics-x86.ll3 define <2 x i64> @test_x86_aesni_aesdec(<2 x i64> %a0, <2 x i64> %a1) {
5 %res = call <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
6 ret <2 x i64> %res
8 declare <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64>, <2 x i64>) nounwind readnone
11 define <2 x i64> @test_x86_aesni_aesdeclast(<2 x i64> %a0, <2 x i64> %a1) {
13 …%res = call <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#use…
14 ret <2 x i64> %res
16 declare <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64>, <2 x i64>) nounwind readnone
19 define <2 x i64> @test_x86_aesni_aesenc(<2 x i64> %a0, <2 x i64> %a1) {
21 %res = call <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
[all …]
/external/llvm/test/CodeGen/PowerPC/
D2007-03-30-SpillerCrash.ll3 define void @test(<4 x float>*, { { i16, i16, i32 } }*) {
5 %.sub7896 = getelementptr [4 x <4 x i32>]* null, i32 0, i32 0 ; <<4 x i32>*> [#uses=24]
6 getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 175, i32 3 ; <<4 x float>*>:2 [#uses=0]
7 getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 174, i32 2 ; <<4 x float>*>:3 [#uses=0]
8 getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 174, i32 3 ; <<4 x float>*>:4 [#uses=0]
9 getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 1 ; <<4 x float>*>:5 [#uses=0]
10 getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 2 ; <<4 x float>*>:6 [#uses=0]
11 getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 3 ; <<4 x float>*>:7 [#uses=0]
12 getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 1 ; <<4 x float>*>:8 [#uses=0]
13 getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 2 ; <<4 x float>*>:9 [#uses=0]
[all …]
/external/valgrind/main/memcheck/tests/amd64/
Dbug132146.c15 ULong bswapq ( ULong x ) in bswapq() argument
17 BSWAPQ(x); BSWAPQ(x); in bswapq()
18 BSWAPQ(x); BSWAPQ(x); in bswapq()
19 BSWAPQ(x); BSWAPQ(x); in bswapq()
20 BSWAPQ(x); BSWAPQ(x); in bswapq()
21 BSWAPQ(x); BSWAPQ(x); in bswapq()
22 BSWAPQ(x); BSWAPQ(x); in bswapq()
23 BSWAPQ(x); BSWAPQ(x); in bswapq()
24 BSWAPQ(x); BSWAPQ(x); in bswapq()
25 BSWAPQ(x); BSWAPQ(x); in bswapq()
[all …]
/external/libmtp/src/
Dgphoto2-endian-ppc.h12 #define swap16(x) NXSwapShort(x) argument
13 #define swap32(x) NXSwapLong(x) argument
14 #define swap64(x) NXSwapLongLong(x) argument
33 # define htobe16(x) htons(x) argument
36 # define htobe32(x) htonl(x) argument
39 # define be16toh(x) ntohs(x) argument
42 # define be32toh(x) ntohl(x) argument
45 #define HTOBE16(x) (x) = htobe16(x) argument
46 #define HTOBE32(x) (x) = htobe32(x) argument
47 #define BE32TOH(x) (x) = be32toh(x) argument
[all …]
Dgphoto2-endian-intel.h12 #define swap16(x) NXSwapShort(x) argument
13 #define swap32(x) NXSwapLong(x) argument
14 #define swap64(x) NXSwapLongLong(x) argument
33 # define htobe16(x) htons(x) argument
36 # define htobe32(x) htonl(x) argument
39 # define be16toh(x) ntohs(x) argument
42 # define be32toh(x) ntohl(x) argument
45 #define HTOBE16(x) (x) = htobe16(x) argument
46 #define HTOBE32(x) (x) = htobe32(x) argument
47 #define BE32TOH(x) (x) = be32toh(x) argument
[all …]
/external/valgrind/main/drd/tests/
Dtc19_shadowmem.stderr.exp-64bit8 Conflicting store by thread x at 0x........ size 1
9 at 0x........: child8 (tc19_shadowmem.c:33)
10 by 0x........: steer (tc19_shadowmem.c:288)
11 by 0x........: vgDrd_thread_wrapper (drd_pthread_intercepts.c:?)
12 Address 0x........ is at offset 0 from 0x......... Allocation context:
13 at 0x........: malloc (vg_replace_malloc.c:...)
14 by 0x........: main (tc19_shadowmem.c:144)
17 Conflicting store by thread x at 0x........ size 1
18 at 0x........: child8 (tc19_shadowmem.c:33)
19 by 0x........: steer (tc19_shadowmem.c:290)
[all …]
Dtc19_shadowmem.stderr.exp-32bit8 Conflicting store by thread x at 0x........ size 1
9 at 0x........: child8 (tc19_shadowmem.c:33)
10 by 0x........: steer (tc19_shadowmem.c:288)
11 by 0x........: vgDrd_thread_wrapper (drd_pthread_intercepts.c:?)
12 Address 0x........ is at offset 0 from 0x......... Allocation context:
13 at 0x........: malloc (vg_replace_malloc.c:...)
14 by 0x........: main (tc19_shadowmem.c:144)
17 Conflicting store by thread x at 0x........ size 1
18 at 0x........: child8 (tc19_shadowmem.c:33)
19 by 0x........: steer (tc19_shadowmem.c:290)
[all …]
/external/oprofile/daemon/
Dopd_ibs_macro.h114 #define IS_IBS_FETCH(x) (IBS_FETCH_BASE <= x && x <= IBS_FETCH_END) argument
115 #define IBS_FETCH_OFFSET(x) (x - IBS_FETCH_BASE) argument
116 #define CHECK_FETCH_SELECTED_FLAG(x) if ( selected_flag & (1 << IBS_FETCH_OFFSET(x))) argument
137 #define IS_IBS_OP(x) (IBS_OP_BASE <= x && x <= IBS_OP_END) argument
138 #define IBS_OP_OFFSET(x) (x - IBS_OP_BASE) argument
139 #define CHECK_OP_SELECTED_FLAG(x) if ( selected_flag & (1 << IBS_OP_OFFSET(x))) argument
176 #define IS_IBS_OP_LS(x) (IBS_OP_LS_BASE <= x && x <= IBS_OP_LS_END) argument
177 #define IBS_OP_LS_OFFSET(x) (x - IBS_OP_LS_BASE) argument
178 #define CHECK_OP_LS_SELECTED_FLAG(x) if ( selected_flag & (1 << IBS_OP_LS_OFFSET(x))) argument
202 #define IS_IBS_OP_NB(x) (IBS_OP_NB_BASE <= x && x <= IBS_OP_NB_END) argument
[all …]
/external/dropbear/libtomcrypt/src/headers/
Dtomcrypt_macros.h22 #define STORE32L(x, y) \ argument
23 { (y)[3] = (unsigned char)(((x)>>24)&255); (y)[2] = (unsigned char)(((x)>>16)&255); \
24 (y)[1] = (unsigned char)(((x)>>8)&255); (y)[0] = (unsigned char)((x)&255); }
26 #define LOAD32L(x, y) \ argument
27 { x = ((unsigned long)((y)[3] & 255)<<24) | \
32 #define STORE64L(x, y) \ argument
33 { (y)[7] = (unsigned char)(((x)>>56)&255); (y)[6] = (unsigned char)(((x)>>48)&255); \
34 (y)[5] = (unsigned char)(((x)>>40)&255); (y)[4] = (unsigned char)(((x)>>32)&255); \
35 (y)[3] = (unsigned char)(((x)>>24)&255); (y)[2] = (unsigned char)(((x)>>16)&255); \
36 (y)[1] = (unsigned char)(((x)>>8)&255); (y)[0] = (unsigned char)((x)&255); }
[all …]
/external/skia/include/core/
DSkFloatingPoint.h27 static inline float sk_float_copysign(float x, float y) { in sk_float_copysign() argument
28 int32_t xbits = SkFloat2Bits(x); in sk_float_copysign()
34 #define sk_float_sqrt(x) (float)::sqrt(x) argument
35 #define sk_float_sin(x) (float)::sin(x) argument
36 #define sk_float_cos(x) (float)::cos(x) argument
37 #define sk_float_tan(x) (float)::tan(x) argument
38 #define sk_float_acos(x) (float)::acos(x) argument
39 #define sk_float_asin(x) (float)::asin(x) argument
40 #define sk_float_atan2(y,x) (float)::atan2(y,x) argument
41 #define sk_float_abs(x) (float)::fabs(x) argument
[all …]
/external/llvm/test/CodeGen/ARM/
Dvaba.ll3 define <8 x i8> @vabas8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
6 %tmp1 = load <8 x i8>* %A
7 %tmp2 = load <8 x i8>* %B
8 %tmp3 = load <8 x i8>* %C
9 %tmp4 = call <8 x i8> @llvm.arm.neon.vabds.v8i8(<8 x i8> %tmp2, <8 x i8> %tmp3)
10 %tmp5 = add <8 x i8> %tmp1, %tmp4
11 ret <8 x i8> %tmp5
14 define <4 x i16> @vabas16(<4 x i16>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
17 %tmp1 = load <4 x i16>* %A
18 %tmp2 = load <4 x i16>* %B
[all …]
Dvhadd.ll3 define <8 x i8> @vhadds8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
6 %tmp1 = load <8 x i8>* %A
7 %tmp2 = load <8 x i8>* %B
8 %tmp3 = call <8 x i8> @llvm.arm.neon.vhadds.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
9 ret <8 x i8> %tmp3
12 define <4 x i16> @vhadds16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
15 %tmp1 = load <4 x i16>* %A
16 %tmp2 = load <4 x i16>* %B
17 %tmp3 = call <4 x i16> @llvm.arm.neon.vhadds.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
18 ret <4 x i16> %tmp3
[all …]
Dvminmax.ll3 define <8 x i8> @vmins8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
6 %tmp1 = load <8 x i8>* %A
7 %tmp2 = load <8 x i8>* %B
8 %tmp3 = call <8 x i8> @llvm.arm.neon.vmins.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
9 ret <8 x i8> %tmp3
12 define <4 x i16> @vmins16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
15 %tmp1 = load <4 x i16>* %A
16 %tmp2 = load <4 x i16>* %B
17 %tmp3 = call <4 x i16> @llvm.arm.neon.vmins.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
18 ret <4 x i16> %tmp3
[all …]
Dvqdmul.ll5 define <4 x i16> @vqdmulhs16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
8 %tmp1 = load <4 x i16>* %A
9 %tmp2 = load <4 x i16>* %B
10 %tmp3 = call <4 x i16> @llvm.arm.neon.vqdmulh.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
11 ret <4 x i16> %tmp3
14 define <2 x i32> @vqdmulhs32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
17 %tmp1 = load <2 x i32>* %A
18 %tmp2 = load <2 x i32>* %B
19 %tmp3 = call <2 x i32> @llvm.arm.neon.vqdmulh.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
20 ret <2 x i32> %tmp3
[all …]

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