| /external/llvm/lib/Target/Mips/ |
| D | MipsTargetMachine.cpp | 38 StringRef CPU, StringRef FS, const TargetOptions &Options, in MipsTargetMachine() argument
42 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in MipsTargetMachine()
43 Subtarget(TT, CPU, FS, isLittle), in MipsTargetMachine()
60 StringRef CPU, StringRef FS, const TargetOptions &Options, in MipsebTargetMachine() argument
63 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in MipsebTargetMachine()
69 StringRef CPU, StringRef FS, const TargetOptions &Options, in MipselTargetMachine() argument
72 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in MipselTargetMachine()
78 StringRef CPU, StringRef FS, const TargetOptions &Options, in Mips64ebTargetMachine() argument
81 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in Mips64ebTargetMachine()
87 StringRef CPU, StringRef FS, const TargetOptions &Options, in Mips64elTargetMachine() argument
[all …]
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| D | MipsTargetMachine.h | 41 StringRef CPU, StringRef FS, const TargetOptions &Options,
83 StringRef CPU, StringRef FS, const TargetOptions &Options,
94 StringRef CPU, StringRef FS, const TargetOptions &Options,
105 StringRef CPU, StringRef FS,
117 StringRef CPU, StringRef FS,
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| D | MipsSubtarget.cpp | 28 const std::string &FS, bool little) : in MipsSubtarget() argument
29 MipsGenSubtargetInfo(TT, CPU, FS), in MipsSubtarget()
40 ParseSubtargetFeatures(CPUName, FS); in MipsSubtarget()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcTargetMachine.cpp | 29 StringRef CPU, StringRef FS, in SparcTargetMachine() argument
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in SparcTargetMachine()
35 Subtarget(TT, CPU, FS, is64bit), in SparcTargetMachine()
79 StringRef FS, in SparcV8TargetMachine() argument
84 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { in SparcV8TargetMachine()
91 StringRef FS, in SparcV9TargetMachine() argument
96 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { in SparcV9TargetMachine()
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| D | SparcSubtarget.cpp | 27 const std::string &FS, bool is64Bit) : in SparcSubtarget() argument
28 SparcGenSubtargetInfo(TT, CPU, FS), in SparcSubtarget()
45 ParseSubtargetFeatures(CPUName, FS); in SparcSubtarget()
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| /external/clang/lib/Analysis/ |
| D | PrintfFormatString.cpp | 36 static bool ParsePrecision(FormatStringHandler &H, PrintfSpecifier &FS, in ParsePrecision() argument
40 FS.setPrecision(ParseNonPositionAmount(Beg, E, *argIndex)); in ParsePrecision()
46 FS.setPrecision(Amt); in ParsePrecision()
88 PrintfSpecifier FS; in ParsePrintfSpecifier() local
89 if (ParseArgPosition(H, FS, Start, I, E)) in ParsePrintfSpecifier()
105 FS.setHasThousandsGrouping(I); in ParsePrintfSpecifier()
107 case '-': FS.setIsLeftJustified(I); break; in ParsePrintfSpecifier()
108 case '+': FS.setHasPlusPrefix(I); break; in ParsePrintfSpecifier()
109 case ' ': FS.setHasSpacePrefix(I); break; in ParsePrintfSpecifier()
110 case '#': FS.setHasAlternativeForm(I); break; in ParsePrintfSpecifier()
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| D | FormatStringParsing.h | 47 bool ParseLengthModifier(FormatSpecifier &FS, const char *&Beg, const char *E,
51 T FS; variable
59 : FS(fs), Start(start), Stop(false) {} in SpecifierResult()
66 return FS; in getValue()
68 const T &getValue() { return FS; } in getValue()
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| D | ScanfFormatString.cpp | 102 ScanfSpecifier FS; in ParseScanfSpecifier() local
103 if (ParseArgPosition(H, FS, Start, I, E)) in ParseScanfSpecifier()
114 FS.setSuppressAssignment(I); in ParseScanfSpecifier()
126 FS.setFieldWidth(Amt); in ParseScanfSpecifier()
136 if (ParseLengthModifier(FS, I, E, LO, /*scanf=*/true) && I == E) { in ParseScanfSpecifier()
182 FS.setConversionSpecifier(CS); in ParseScanfSpecifier()
183 if (CS.consumesDataArgument() && !FS.getSuppressAssignment() in ParseScanfSpecifier()
184 && !FS.usesPositionalArg()) in ParseScanfSpecifier()
185 FS.setArgIndex(argIndex++); in ParseScanfSpecifier()
192 return !H.HandleInvalidScanfConversionSpecifier(FS, Beg, I - Beg); in ParseScanfSpecifier()
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTargetMachine.cpp | 31 StringRef CPU, StringRef FS, in PPCTargetMachine() argument
36 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in PPCTargetMachine()
37 Subtarget(TT, CPU, FS, is64Bit), in PPCTargetMachine()
51 StringRef CPU, StringRef FS, in PPC32TargetMachine() argument
55 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { in PPC32TargetMachine()
61 StringRef CPU, StringRef FS, in PPC64TargetMachine() argument
65 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { in PPC64TargetMachine()
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| /external/llvm/lib/MC/ |
| D | MCSubtargetInfo.cpp | 21 MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, in InitMCSubtargetInfo() argument
39 SubtargetFeatures Features(FS); in InitMCSubtargetInfo()
47 uint64_t MCSubtargetInfo::ReInitMCSubtargetInfo(StringRef CPU, StringRef FS) { in ReInitMCSubtargetInfo() argument
48 SubtargetFeatures Features(FS); in ReInitMCSubtargetInfo()
63 uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) { in ToggleFeature() argument
65 FeatureBits = Features.ToggleFeature(FeatureBits, FS, in ToggleFeature()
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| /external/llvm/lib/Target/PTX/ |
| D | PTXTargetMachine.cpp | 72 StringRef TT, StringRef CPU, StringRef FS, in PTXTargetMachine() argument
77 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in PTXTargetMachine()
79 Subtarget(TT, CPU, FS, is64Bit), in PTXTargetMachine()
89 StringRef CPU, StringRef FS, in PTX32TargetMachine() argument
93 : PTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { in PTX32TargetMachine()
99 StringRef CPU, StringRef FS, in PTX64TargetMachine() argument
103 : PTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { in PTX64TargetMachine()
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| D | PTXSubtarget.cpp | 28 const std::string &FS, bool is64Bit) in PTXSubtarget() argument
29 : PTXGenSubtargetInfo(TT, CPU, FS), in PTXSubtarget()
38 ParseSubtargetFeatures(TARGET, FS); in PTXSubtarget()
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| /external/llvm/lib/Target/X86/ |
| D | X86TargetMachine.cpp | 34 StringRef CPU, StringRef FS, in X86_32TargetMachine() argument
38 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false), in X86_32TargetMachine()
57 StringRef CPU, StringRef FS, in X86_64TargetMachine() argument
61 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true), in X86_64TargetMachine()
73 StringRef CPU, StringRef FS, in X86TargetMachine() argument
78 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in X86TargetMachine()
79 Subtarget(TT, CPU, FS, Options.StackAlignmentOverride, is64Bit), in X86TargetMachine()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetMachine.cpp | 41 StringRef CPU, StringRef FS, in ARMBaseTargetMachine() argument
45 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in ARMBaseTargetMachine()
46 Subtarget(TT, CPU, FS), in ARMBaseTargetMachine()
57 StringRef CPU, StringRef FS, in ARMTargetMachine() argument
61 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in ARMTargetMachine()
83 StringRef CPU, StringRef FS, in ThumbTargetMachine() argument
87 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in ThumbTargetMachine()
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| D | ARMSubtarget.cpp | 38 const std::string &FS) in ARMSubtarget() argument
39 : ARMGenSubtargetInfo(TT, CPU, FS) in ARMSubtarget()
86 if (!FS.empty()) { in ARMSubtarget()
88 ArchFS = ArchFS + "," + FS; in ARMSubtarget()
90 ArchFS = FS; in ARMSubtarget()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430Subtarget.cpp | 28 const std::string &FS) : in MSP430Subtarget() argument
29 MSP430GenSubtargetInfo(TT, CPU, FS) { in MSP430Subtarget()
33 ParseSubtargetFeatures(CPUName, FS); in MSP430Subtarget()
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| D | MSP430TargetMachine.cpp | 30 StringRef FS, in MSP430TargetMachine() argument
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in MSP430TargetMachine()
35 Subtarget(TT, CPU, FS), in MSP430TargetMachine()
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| /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.build.tools/src_rss/org/eclipse/releng/services/rss/ |
| D | RSSFeedPublisherTask.java | 53 private static final String FS = File.separator; field in RSSFeedPublisherTask
176 File destFile = new File(CVSTemp + FS + "checkoutDir" + FS + filename); //$NON-NLS-1$ in commitFeedToCVS()
201 runCVSExecTask("add " + filename, CVSTemp + FS + "checkoutDir"); //$NON-NLS-1$ //$NON-NLS-2$ in commitFeedToCVS()
206 … runCVSExecTask("ci -m '' " + filename, CVSTemp + FS + "checkoutDir"); //$NON-NLS-1$ //$NON-NLS-2$ in commitFeedToCVS()
218 String targetPath = SCPTarget.substring(SCPTarget.indexOf(CL)+1,SCPTarget.lastIndexOf(FS)); in publishFeedWithSCP()
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| /external/clang/lib/Sema/ |
| D | SemaChecking.cpp | 1842 bool CheckNumArgs(const analyze_format_string::FormatSpecifier &FS,
1853 const analyze_format_string::FormatSpecifier *FS);
2012 const analyze_format_string::FormatSpecifier &FS, in CheckNumArgs() argument
2017 PartialDiagnostic PDiag = FS.usesPositionalArg() in CheckNumArgs()
2102 const analyze_printf::PrintfSpecifier &FS,
2106 bool HandlePrintfSpecifier(const analyze_printf::PrintfSpecifier &FS,
2112 void HandleInvalidAmount(const analyze_printf::PrintfSpecifier &FS,
2116 void HandleFlag(const analyze_printf::PrintfSpecifier &FS,
2119 void HandleIgnoredFlag(const analyze_printf::PrintfSpecifier &FS,
2127 const analyze_printf::PrintfSpecifier &FS, in HandleInvalidPrintfConversionSpecifier() argument
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSubtarget.cpp | 34 HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS): in HexagonSubtarget() argument
35 HexagonGenSubtargetInfo(TT, CPU, FS), in HexagonSubtarget()
38 ParseSubtargetFeatures(CPU, FS); in HexagonSubtarget()
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| /external/llvm/include/llvm/MC/ |
| D | MCSubtargetInfo.h | 42 void InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
62 uint64_t ReInitMCSubtargetInfo(StringRef CPU, StringRef FS);
70 uint64_t ToggleFeature(StringRef FS);
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeSubtarget.cpp | 28 const std::string &FS): in MBlazeSubtarget() argument
29 MBlazeGenSubtargetInfo(TT, CPU, FS), in MBlazeSubtarget()
37 ParseSubtargetFeatures(CPUName, FS); in MBlazeSubtarget()
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| D | MBlazeTargetMachine.cpp | 36 StringRef CPU, StringRef FS, const TargetOptions &Options, in MBlazeTargetMachine() argument
39 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in MBlazeTargetMachine()
40 Subtarget(TT, CPU, FS), in MBlazeTargetMachine()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreTargetMachine.cpp | 24 StringRef CPU, StringRef FS, in XCoreTargetMachine() argument
28 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in XCoreTargetMachine()
29 Subtarget(TT, CPU, FS), in XCoreTargetMachine()
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUSubtarget.cpp | 26 const std::string &FS) : in SPUSubtarget() argument
27 SPUGenSubtargetInfo(TT, CPU, FS), in SPUSubtarget()
37 ParseSubtargetFeatures(default_cpu, FS); in SPUSubtarget()
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