Home
last modified time | relevance | path

Searched refs:Iend_LE (Results 1 – 13 of 13) sorted by relevance

/external/valgrind/main/VEX/priv/
Dir_defs.c1009 vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" ); in ppIRExpr()
1098 vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" ); in ppIRCAS()
1195 vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" ); in ppIRStmt()
1207 s->Ist.LLSC.end==Iend_LE ? "le" : "be"); in ppIRStmt()
1213 s->Ist.LLSC.end==Iend_LE ? "le" : "be"); in ppIRStmt()
1458 vassert(end == Iend_LE || end == Iend_BE); in IRExpr_Load()
1669 vassert(end == Iend_LE || end == Iend_BE); in IRStmt_Store()
3206 if (expr->Iex.Load.end != Iend_LE && expr->Iex.Load.end != Iend_BE) in tcExpr()
3301 if (stmt->Ist.Store.end != Iend_LE && stmt->Ist.Store.end != Iend_BE) in tcStmt()
3358 if (stmt->Ist.LLSC.end != Iend_LE && stmt->Ist.LLSC.end != Iend_BE) in tcStmt()
Dhost_x86_isel.c754 if (e->Iex.Load.end != Iend_LE) in iselIntExpr_R_wrk()
1061 IRExpr_Load(Iend_LE,Ity_I8,bind(0))) ); in iselIntExpr_R_wrk()
1075 IRExpr_Load(Iend_LE,Ity_I8,bind(0))) ); in iselIntExpr_R_wrk()
1089 IRExpr_Load(Iend_LE,Ity_I16,bind(0))) ); in iselIntExpr_R_wrk()
1528 && e->Iex.Load.end == Iend_LE) { in iselIntExpr_RMI_wrk()
1966 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselInt64Expr_wrk()
2772 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselFltExpr_wrk()
2915 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselDblExpr_wrk()
3168 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselVecExpr_wrk()
3189 IRExpr_Load(Iend_LE,Ity_I64,bind(0)))); in iselVecExpr_wrk()
[all …]
Dhost_amd64_isel.c884 if (e->Iex.Load.end != Iend_LE) in iselIntExpr_R_wrk()
1399 IRExpr_Load(Iend_LE,Ity_I8,bind(0))) ); in iselIntExpr_R_wrk()
1412 IRExpr_Load(Iend_LE,Ity_I16,bind(0))) ); in iselIntExpr_R_wrk()
2009 && e->Iex.Load.end == Iend_LE) { in iselIntExpr_RMI_wrk()
2818 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselFltExpr_wrk()
2966 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselDblExpr_wrk()
3272 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselVecExpr_wrk()
3817 if (tya != Ity_I64 || end != Iend_LE) in iselStmt()
Dguest_arm_toIR.c312 return IRExpr_Load(Iend_LE, ty, addr); in loadLE()
328 stmt( IRStmt_Store(Iend_LE, addr, data) ); in storeLE()
13404 stmt( IRStmt_LLSC(Iend_LE, tOld, mkexpr(tRn), in disInstr_ARM_WRK()
13406 stmt( IRStmt_LLSC(Iend_LE, tSC1, mkexpr(tRn), in disInstr_ARM_WRK()
13411 stmt( IRStmt_LLSC(Iend_LE, tOld, mkexpr(tRn), in disInstr_ARM_WRK()
13413 stmt( IRStmt_LLSC(Iend_LE, tSC1, mkexpr(tRn), in disInstr_ARM_WRK()
13467 stmt( IRStmt_LLSC(Iend_LE, res, getIRegA(rN), in disInstr_ARM_WRK()
13532 stmt( IRStmt_LLSC(Iend_LE, resSC1, getIRegA(rN), mkexpr(data)) ); in disInstr_ARM_WRK()
17905 stmt( IRStmt_LLSC(Iend_LE, in disInstr_THUMB_WRK()
17927 stmt( IRStmt_LLSC(Iend_LE, res, getIRegT(rN), in disInstr_THUMB_WRK()
[all …]
Dhost_arm_isel.c1091 if (e->Iex.Load.end != Iend_LE) in iselIntExpr_R_wrk()
1836 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselInt64Expr_wrk()
2079 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselNeon64Expr_wrk()
5321 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselDblExpr_wrk()
5479 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_LE) { in iselFltExpr_wrk()
5611 if (tya != Ity_I32 || end != Iend_LE) in iselStmt()
Dguest_x86_toIR.c643 stmt( IRStmt_Store(Iend_LE, addr, data) ); in storeLE()
705 return IRExpr_Load(Iend_LE, ty, addr); in loadLE()
764 cas = mkIRCAS( IRTemp_INVALID, oldTmp, Iend_LE, addr, in casLE()
6569 mkIRCAS( IRTemp_INVALID, dest, Iend_LE, mkexpr(addr), in dis_cmpxchg_G_E()
14496 Iend_LE, mkexpr(addr), in disInstr_X86_WRK()
Dguest_amd64_toIR.c304 stmt( IRStmt_Store(Iend_LE, addr, data) ); in storeLE()
309 return IRExpr_Load(Iend_LE, ty, addr); in loadLE()
1486 cas = mkIRCAS( IRTemp_INVALID, oldTmp, Iend_LE, addr, in casLE()
7838 mkIRCAS( IRTemp_INVALID, dest, Iend_LE, mkexpr(addr), in dis_cmpxchg_G_E()
18171 Iend_LE, mkexpr(addr), in disInstr_AMD64_WRK()
/external/valgrind/tsan/
Dts_valgrind.cc1066 IRStmt *store_stmt = IRStmt_Store(Iend_LE, IRExpr_RdTmp(temp), x); in gen_store_to_tleb()
1127 IRExpr *addr_load_expr = IRExpr_Load(Iend_LE, tyAddr, addr); in instrument_mem_access()
1376 IRExpr *tleb_expr = IRExpr_Load(Iend_LE, tyAddr, tleb_ptr_expr); in ts_instrument()
/external/valgrind/main/memcheck/
Dmc_translate.c3569 tl_assert(end == Iend_LE || end == Iend_BE); in expr2vbits_Load_WRK()
3579 if (end == Iend_LE) { in expr2vbits_Load_WRK()
3648 tl_assert(end == Iend_LE || end == Iend_BE); in expr2vbits_Load()
3656 if (end == Iend_LE) { in expr2vbits_Load()
3839 tl_assert( end == Iend_LE || end == Iend_BE ); in do_shadow_Store()
3882 if (end == Iend_LE) { in do_shadow_Store()
3930 if (end == Iend_LE) { in do_shadow_Store()
4028 end = Iend_LE; in do_shadow_Dirty()
4594 if (cas->end == Iend_LE) { in do_shadow_CAS_double()
/external/valgrind/main/VEX/pub/
Dlibvex_ir.h247 Iend_LE=0x12000, /* little endian */ enumerator
/external/valgrind/main/exp-dhat/
Ddh_main.c778 # define END Iend_LE in add_counter_update()
/external/valgrind/main/massif/
Dms_main.c2042 # define END Iend_LE in add_counter_update()
/external/valgrind/main/callgrind/
Dmain.c781 # define CLGEndness Iend_LE