Searched refs:MSR_P4_TBPU_ESCR0 (Results 1 – 3 of 3) sorted by relevance
313 #ifndef MSR_P4_TBPU_ESCR0314 #define MSR_P4_TBPU_ESCR0 0x3c2 macro
339 { { CTR_MS_0, MSR_P4_TBPU_ESCR0},345 { { CTR_MS_0, MSR_P4_TBPU_ESCR0},
273 #define MSR_P4_TBPU_ESCR0 0x000003c2 macro