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Searched refs:PRED (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/CodeGen/
DShrinkWrapping.cpp246 MachineBasicBlock* PRED = *PI; in calcAvailInOut() local
247 if (PRED != MBB) in calcAvailInOut()
248 predecessors.push_back(PRED); in calcAvailInOut()
254 MachineBasicBlock* PRED = predecessors[i]; in calcAvailInOut() local
256 AvailIn[MBB] = AvailOut[PRED]; in calcAvailInOut()
258 PRED = predecessors[i]; in calcAvailInOut()
259 AvailIn[MBB] &= AvailOut[PRED]; in calcAvailInOut()
572 MachineBasicBlock* PRED = *PI; in addUsesForMEMERegion() local
573 if (PRED->succ_size() > 1) { in addUsesForMEMERegion()
613 MachineBasicBlock* PRED = *PI; in addUsesForMEMERegion() local
[all …]
/external/libvpx/vp8/common/
Dmbpitch.c16 PRED = 0, enumerator
129 setup_macroblock(x, PRED); in vp8_build_block_doffsets()
/external/llvm/lib/Target/Hexagon/
DHexagonIntrinsicsV4.td213 * ALU32/PRED *
216 // ALU32 / PRED / Conditional Shift Halfword.
217 // ALU32 / PRED / Conditional Sign Extend.
218 // ALU32 / PRED / Conditional Zero Extend.
219 // ALU32 / PRED / Compare.
227 // ALU32 / PRED / cmpare To General Register.
DHexagonIntrinsics.td1921 * ALU32/PRED *
1924 // ALU32 / PRED / Compare.
3171 * STYPE/PRED *
3174 // STYPE / PRED / Mask generate from predicate.
3178 // STYPE / PRED / Predicate transfer.
3184 // STYPE / PRED / Viterbi pack even and odd predicate bits.
DHexagonInstrInfo.td318 // ALU32/PRED +
555 // ALU32/PRED -
2114 // STYPE/PRED +
2126 // STYPE/PRED -
DHexagonInstrInfoV4.td3357 // XTYPE/PRED +
3513 // XTYPE/PRED -