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Searched refs:data_addr (Results 1 – 23 of 23) sorted by relevance

/external/chromium/net/data/cache_tests/list_loop/
Dcontents.txt30 data_addr[0]: 0xa0010008
51 data_addr[0]: 0xa0010004
72 data_addr: 0's
93 data_addr: 0's
114 data_addr: 0's
135 data_addr: 0's
156 data_addr: 0's
177 data_addr: 0's
/external/chromium/net/disk_cache/
Dentry_impl.cc482 Addr address(entry_.Data()->data_addr[index]); in DeleteEntryData()
486 entry_.Data()->data_addr[index] = 0; in DeleteEntryData()
629 Addr data_addr(stored->data_addr[i]); in DataSanityCheck() local
633 if (!data_size && data_addr.is_initialized()) in DataSanityCheck()
635 if (!data_addr.SanityCheck()) in DataSanityCheck()
639 if (data_size <= kMaxBlockSize && data_addr.is_separate_file()) in DataSanityCheck()
641 if (data_size > kMaxBlockSize && data_addr.is_block_file()) in DataSanityCheck()
655 Addr data_addr(stored->data_addr[i]); in FixForDelete() local
657 if (data_addr.is_initialized()) { in FixForDelete()
658 if ((data_size <= kMaxBlockSize && data_addr.is_separate_file()) || in FixForDelete()
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Ddisk_format.h123 CacheAddr data_addr[4]; // entry. member
Dbackend_impl.cc2090 for (size_t i = 0; i < arraysize(data->data_addr); i++) { in CheckEntry()
2091 if (data->data_addr[i]) { in CheckEntry()
2092 Addr address(data->data_addr[i]); in CheckEntry()
/external/llvm/test/DebugInfo/
D2010-05-03-OriginDIE.ll14 %data_addr.i18 = alloca i64, align 8 ; <i64*> [#uses=1]
15 %data_addr.i17 = alloca i64, align 8 ; <i64*> [#uses=2]
16 %data_addr.i16 = alloca i64, align 8 ; <i64*> [#uses=0]
17 %data_addr.i15 = alloca i32, align 4 ; <i32*> [#uses=0]
18 %data_addr.i = alloca i64, align 8 ; <i64*> [#uses=0]
22 %a9 = load volatile i64* %data_addr.i18, align 8 ; <i64> [#uses=1]
26 call void @llvm.dbg.declare(metadata !{i64* %data_addr.i17}, metadata !8) nounwind, !dbg !14
27 store i64 %a12, i64* %data_addr.i17, align 8
31 call void @llvm.dbg.value(metadata !{i64* %data_addr.i17}, i64 0, metadata !34) nounwind
32 %a13 = load volatile i64* %data_addr.i17, align 8 ; <i64> [#uses=1]
/external/chromium/net/data/cache_tests/bad_rankings/
Dcontents.txt23 data_addr: 0's
44 data_addr: 0's
/external/chromium/net/data/cache_tests/bad_entry/
Dcontents.txt23 data_addr: 0's
44 data_addr: 0's
/external/chromium/net/data/cache_tests/bad_rankings2/
Dcontents.txt23 data_addr: 0's
44 data_addr: 0's
/external/valgrind/main/coregrind/m_debuginfo/
Ddebuginfo.c1564 Bool VG_(get_datasym_and_offset)( Addr data_addr, in VG_()
1572 data_addr, dname, n_dname, in VG_()
2612 Addr data_addr, in data_address_is_in_var() argument
2638 data_addr, var->name ); in data_address_is_in_var()
2659 && res.word <= data_addr in data_address_is_in_var()
2660 && data_addr < res.word + var_szB) { in data_address_is_in_var()
2661 *offset = data_addr - res.word; in data_address_is_in_var()
2677 Addr data_addr, in format_message() argument
2735 data_addr, var_offset, vo_plural, var->name ); in format_message()
2744 data_addr, var_offset, vo_plural, var->name ); in format_message()
[all …]
/external/chromium/net/data/cache_tests/dirty_entry2/
Dcontents.txt23 data_addr: 0's
44 data_addr: 0's
/external/chromium/net/data/cache_tests/dirty_entry/
Dcontents.txt23 data_addr: 0's
44 data_addr: 0's
/external/valgrind/main/helgrind/
Dhg_errors.h52 Addr data_addr, Int szB, Bool isWrite,
87 Addr data_addr );
Dhg_errors.c292 Addr data_addr; member
426 xe->XE.Race.data_addr in HG_()
443 xe->XE.Race.data_addr ); in HG_()
467 Addr acc_addr = xe->XE.Race.data_addr; in HG_()
505 Addr data_addr, Int szB, Bool isWrite, in HG_()
520 VgSectKind sect = VG_(DebugInfo_sect_kind)( NULL, 0, data_addr ); in HG_()
522 data_addr, VG_(pp_SectKind)(sect)); in HG_()
532 xe.XE.Race.data_addr = data_addr; in HG_()
561 XE_Race, data_addr, NULL, &xe ); in HG_()
704 ? xe1->XE.Race.data_addr == xe2->XE.Race.data_addr in HG_()
Dhg_main.c4053 Addr data_addr ) in HG_()
4065 data_addr - (UWord)(UInt)i * sizeof(UWord) ); in HG_()
4066 if (UNLIKELY(mm && addr_is_in_MM_Chunk(mm, data_addr))) in HG_()
4075 if (UNLIKELY(addr_is_in_MM_Chunk(mm, data_addr))) in HG_()
4085 tl_assert(addr_is_in_MM_Chunk(mm, data_addr)); in HG_()
/external/qemu/hw/
Dfw_cfg.c254 target_phys_addr_t ctl_addr, target_phys_addr_t data_addr) in fw_cfg_init() argument
273 if (data_addr) { in fw_cfg_init()
276 cpu_register_physical_memory(data_addr, FW_CFG_SIZE, io_data_memory); in fw_cfg_init()
Dfw_cfg.h36 target_phys_addr_t crl_addr, target_phys_addr_t data_addr);
/external/valgrind/main/include/
Dpub_tool_debuginfo.h94 extern Bool VG_(get_datasym_and_offset)( Addr data_addr,
114 Addr data_addr
/external/llvm/test/CodeGen/Thumb2/
Dmachine-licm.ll101 %data_addr.013 = phi i8 [ %data, %bb.nph ], [ %8, %bb ] ; <i8> [#uses=2]
105 %1 = xor i8 %data_addr.013, %0 ; <i8> [#uses=1]
114 %8 = lshr i8 %data_addr.013, 1 ; <i8> [#uses=1]
/external/valgrind/main/callgrind/
Dsim.c1148 static void log_1I1Dr(InstrInfo* ii, Addr data_addr, Word data_size) in log_1I1Dr() argument
1154 DrRes = (*simulator.D1_Read)(data_addr, data_size); in log_1I1Dr()
1158 data_addr, data_size, cacheRes(DrRes)); in log_1I1Dr()
1181 static void log_0I1Dr(InstrInfo* ii, Addr data_addr, Word data_size) in log_0I1Dr() argument
1186 DrRes = (*simulator.D1_Read)(data_addr, data_size); in log_0I1Dr()
1189 data_addr, data_size, cacheRes(DrRes)); in log_0I1Dr()
1208 static void log_1I1Dw(InstrInfo* ii, Addr data_addr, Word data_size) in log_1I1Dw() argument
1214 DwRes = (*simulator.D1_Write)(data_addr, data_size); in log_1I1Dw()
1218 data_addr, data_size, cacheRes(DwRes)); in log_1I1Dw()
1240 static void log_0I1Dw(InstrInfo* ii, Addr data_addr, Word data_size) in log_0I1Dw() argument
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/external/valgrind/main/cachegrind/
Dcg_main.c362 void log_1I_1Dr_cache_access(InstrInfo* n, Addr data_addr, Word data_size) in log_1I_1Dr_cache_access() argument
371 cachesim_D1_doref(data_addr, data_size, in log_1I_1Dr_cache_access()
377 void log_1I_1Dw_cache_access(InstrInfo* n, Addr data_addr, Word data_size) in log_1I_1Dw_cache_access() argument
386 cachesim_D1_doref(data_addr, data_size, in log_1I_1Dw_cache_access()
392 void log_0I_1Dr_cache_access(InstrInfo* n, Addr data_addr, Word data_size) in log_0I_1Dr_cache_access() argument
396 cachesim_D1_doref(data_addr, data_size, in log_0I_1Dr_cache_access()
402 void log_0I_1Dw_cache_access(InstrInfo* n, Addr data_addr, Word data_size) in log_0I_1Dw_cache_access() argument
406 cachesim_D1_doref(data_addr, data_size, in log_0I_1Dw_cache_access()
/external/libnfc-nxp/src/
DphDnldNfc.c369 uint8_t data_addr[PHDNLD_ADDR_SIZE]; member
388 uint8_t data_addr[PHDNLD_ADDR_SIZE]; member
1324 p_data_param->data_addr[i] = (uint8_t)((read_addr >> in phDnldNfc_Read()
1333 p_data_param->data_addr[i] = (uint8_t)((read_addr >> in phDnldNfc_Read()
1339 p_data_param->data_addr[i] = (uint8_t)(read_addr & BYTE_MASK); in phDnldNfc_Read()
1489 dnld_data->data_addr[i] = (uint8_t)((dnld_addr >> in phDnldNfc_Process_Write()
1498 dnld_data->data_addr[i] = (uint8_t)((dnld_addr >> BYTE_SIZE) in phDnldNfc_Process_Write()
1505 dnld_data->data_addr[i] = (uint8_t)(dnld_addr & BYTE_MASK); in phDnldNfc_Process_Write()
1929 p_data_param->data_addr[i] = (uint8_t)((dnld_addr >> in phDnldNfc_Sequence()
1939 p_data_param->data_addr[i] = (uint8_t)((dnld_addr >> BYTE_SIZE) in phDnldNfc_Sequence()
[all …]
/external/valgrind/main/exp-bbv/tests/arm-linux/
Dll.S34 ldr r11,data_addr
426 data_addr: .word data_begin label
/external/chromium/net/tools/dump_cache/
Ddump_files.cc249 printf("data addr %d: 0x%x\n", i, entry.data_addr[i]); in DumpEntry()