Searched refs:hexagon (Results 1 – 25 of 30) sorted by relevance
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/external/llvm/test/CodeGen/Hexagon/ |
D | vaddh.ll | 2 ; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s 12 %2 = call i32 @llvm.hexagon.A2.svaddh(i32 %0, i32 %1) 17 declare i32 @llvm.hexagon.A2.svaddh(i32, i32) nounwind readnone
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D | combine.ll | 2 ; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s 13 %2 = call i64 @llvm.hexagon.A2.combinew(i32 %0, i32 %conv) 18 declare i64 @llvm.hexagon.A2.combinew(i32, i32) nounwind readnone
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D | struct_args.ll | 2 ; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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D | struct_args_large.ll | 2 ; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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D | args.ll | 2 ; DISABLED: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s
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D | static.ll | 2 ; DISABLED: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s
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D | frame.ll | 2 ; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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D | mpy.ll | 2 ; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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D | float.ll | 2 ; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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D | double.ll | 2 ; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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/external/llvm/lib/Support/ |
D | Triple.cpp | 24 case hexagon: return "hexagon"; in getArchTypeName() 65 case hexagon: return "hexagon"; in getArchTypePrefix() 155 .Case("hexagon", hexagon) in getArchTypeForLLVMName() 247 .Case("hexagon", Triple::hexagon) in parseArch() 650 case llvm::Triple::hexagon: in getArchPointerBitWidth() 699 case Triple::hexagon: in get32BitArchVariant() 732 case Triple::hexagon: in get64BitArchVariant()
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/external/llvm/lib/Target/Hexagon/TargetInfo/ |
D | HexagonTargetInfo.cpp | 18 RegisterTarget<Triple::hexagon, /*HasJIT=*/false> X(TheHexagonTarget, "hexagon", "Hexagon"); in LLVMInitializeHexagonTargetInfo()
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/external/llvm/include/llvm/ADT/ |
D | Triple.h | 48 hexagon, // Hexagon: hexagon enumerator
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/external/clang/include/clang/Basic/ |
D | LangOptions.def | 137 LANGOPT(HexagonQdsp6Compat , 1, 0, "hexagon-qdsp6 backward compatibility")
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/external/clang/lib/Driver/ |
D | Tools.h | 158 namespace hexagon {
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D | Tools.cpp | 1753 case llvm::Triple::hexagon: in ConstructJob() 2235 llvm::Triple::hexagon)) in ConstructJob() 2253 getToolChain().getTriple().getArch() != llvm::Triple::hexagon) || in ConstructJob() 3002 void hexagon::Assemble::RenderExtraToolArgs(const JobAction &JA, in RenderExtraToolArgs() 3006 void hexagon::Assemble::ConstructJob(Compilation &C, const JobAction &JA, in ConstructJob() 3064 void hexagon::Link::RenderExtraToolArgs(const JobAction &JA, in RenderExtraToolArgs() 3069 void hexagon::Link::ConstructJob(Compilation &C, const JobAction &JA, in ConstructJob()
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D | ToolChains.cpp | 1488 T = new tools::hexagon::Assemble(*this); break; in SelectTool() 1490 T = new tools::hexagon::Link(*this); break; in SelectTool()
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D | Driver.cpp | 1687 if (Target.getArch() == llvm::Triple::hexagon) in getToolChain()
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/external/llvm/unittests/ADT/ |
D | TripleTest.cpp | 290 T.setArch(Triple::hexagon); in TEST()
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/external/llvm/autoconf/ |
D | config.sub | 259 | hexagon \
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D | configure.ac | 370 hexagon-*) llvm_cv_target_arch="Hexagon" ;; 630 host, x86, x86_64, sparc, powerpc, arm, mips, spu, hexagon, 651 hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;;
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/external/llvm/projects/sample/autoconf/ |
D | configure.ac | 310 hexagon-*) llvm_cv_target_arch="Hexagon" ;; 569 host, x86, x86_64, sparc, powerpc, arm, mips, spu, hexagon, 588 hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;;
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/external/llvm/include/llvm/ |
D | IntrinsicsHexagon.td | 16 // All Hexagon intrinsics start with "llvm.hexagon.". 17 let TargetPrefix = "hexagon" in {
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/external/clang/lib/Basic/ |
D | Targets.cpp | 3916 case llvm::Triple::hexagon: in AllocateTarget()
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/external/clang/include/clang/Driver/ |
D | CC1Options.td | 801 HelpText<"Enable hexagon-qdsp6 backward compatibility">;
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