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/external/llvm/test/CodeGen/X86/
Dmmx-arith.ll1 ; RUN: llc < %s -march=x86 -mattr=+mmx
16 …%tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.b( x86_mmx %tmp4a, x86_mmx %tmp7 ) ; <x86_mmx> [#u…
19 …%tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.b( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> […
28 …%tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.b( x86_mmx %tmp28a, x86_mmx %tmp31 ) ; <x86_mmx> […
31 …%tmp45 = tail call x86_mmx @llvm.x86.mmx.psubus.b( x86_mmx %tmp36, x86_mmx %tmp40 ) ; <x86_mmx> […
55 tail call void @llvm.x86.mmx.emms( )
97 tail call void @llvm.x86.mmx.emms( )
111 …%tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.w( x86_mmx %tmp4a, x86_mmx %tmp7 ) ; <x86_mmx> [#u…
114 …%tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> […
123 …%tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.w( x86_mmx %tmp28a, x86_mmx %tmp31 ) ; <x86_mmx> […
[all …]
Dmmx-shift.ll1 ; RUN: llc < %s -march=x86 -mattr=+mmx | grep psllq | grep 32
2 ; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep psllq | grep 32
3 ; RUN: llc < %s -march=x86 -mattr=+mmx | grep psrad
4 ; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep psrlw
9 %tmp6 = tail call x86_mmx @llvm.x86.mmx.pslli.q( x86_mmx %tmp, i32 32 ) ; <x86_mmx> [#uses=1]
14 declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32) nounwind readnone
18 …%tmp7 = tail call x86_mmx @llvm.x86.mmx.psra.d( x86_mmx %mm1, x86_mmx %mm2 ) nounwind readnone ;…
23 declare x86_mmx @llvm.x86.mmx.psra.d(x86_mmx, x86_mmx) nounwind readnone
27 …%tmp8 = tail call x86_mmx @llvm.x86.mmx.psrli.w( x86_mmx %mm1, i32 %bits ) nounwind readnone ; <…
32 declare x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx, i32) nounwind readnone
Dmmx-bitcast-to-i64.ll5 %u = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %t, x86_mmx %t)
11 %u = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %t, x86_mmx %t)
17 %u = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %t, x86_mmx %t)
23 %u = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %t, x86_mmx %t)
28 declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx)
29 declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx)
30 declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx)
31 declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx)
Dmmx-builtins.ll1 ; RUN: llc < %s -march=x86 -mattr=+mmx,+ssse3 | FileCheck %s
20 declare x86_mmx @llvm.x86.mmx.pcmpgt.d(x86_mmx, x86_mmx) nounwind readnone
29 %2 = tail call x86_mmx @llvm.x86.mmx.pcmpgt.d(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind
36 declare x86_mmx @llvm.x86.mmx.pcmpgt.w(x86_mmx, x86_mmx) nounwind readnone
45 %2 = tail call x86_mmx @llvm.x86.mmx.pcmpgt.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind
52 declare x86_mmx @llvm.x86.mmx.pcmpgt.b(x86_mmx, x86_mmx) nounwind readnone
61 %2 = tail call x86_mmx @llvm.x86.mmx.pcmpgt.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind
68 declare x86_mmx @llvm.x86.mmx.pcmpeq.d(x86_mmx, x86_mmx) nounwind readnone
77 %2 = tail call x86_mmx @llvm.x86.mmx.pcmpeq.d(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind
84 declare x86_mmx @llvm.x86.mmx.pcmpeq.w(x86_mmx, x86_mmx) nounwind readnone
[all …]
D2007-06-15-IntToMMX.ll1 ; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep paddusw
8 …%tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp2, x86_mmx %tmp3 ) ; <x86_mmx> [#u…
10 tail call void @llvm.x86.mmx.emms( )
14 declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx)
16 declare void @llvm.x86.mmx.emms()
Dmmx-punpckhdq.ll1 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse42 -mtriple=x86_64-apple-darwin10 | FileCheck %s
13 tail call void @llvm.x86.mmx.emms( )
24 %tmp9 = tail call x86_mmx @llvm.x86.mmx.punpckhdq (x86_mmx %tmp2, x86_mmx %tmp2)
26 tail call void @llvm.x86.mmx.emms( )
30 declare x86_mmx @llvm.x86.mmx.punpckhdq(x86_mmx, x86_mmx)
31 declare void @llvm.x86.mmx.emms()
D2007-07-03-GR64ToVR64.ll1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | FileCheck %s
13 …%tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp6, x86_mmx %tmp4 ) ; <x86_mmx> [#us…
15 tail call void @llvm.x86.mmx.emms( )
19 declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx)
20 declare void @llvm.x86.mmx.emms()
D2010-04-23-mmx-movdq2q.ll1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | FileCheck %s
56 %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %tmp1, x86_mmx %tmp2)
68 %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %tmp1, x86_mmx %tmp2)
80 %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %tmp1, x86_mmx %tmp2)
92 %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %tmp1, x86_mmx %tmp2)
97 declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx)
98 declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx)
99 declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx)
100 declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx)
Dmmx-arg-passing.ll1 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | grep mm0 | count 1
2 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | grep esp | count 2
3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep xmm0
4 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep rdi
5 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | not grep movups
Dmmx-emms.ll1 ; RUN: llc < %s -march=x86 -mattr=+mmx | grep emms
4 call void @llvm.x86.mmx.emms( )
11 declare void @llvm.x86.mmx.emms()
Dmmx-insert-element.ll1 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep movq
2 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pshufd
Dscalar-extract.ll1 ; RUN: llc < %s -march=x86 -mattr=+mmx -o %t
4 ; Check that widening doesn't introduce a mmx register in this case when
D2009-08-02-mmx-scalar-to-vector.ll3 declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32)
9 %t2 = tail call x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx %t0, i32 48)
D2007-04-25-MMX-PADDQ.ll1 ; RUN: llc < %s -o - -march=x86 -mattr=+mmx | FileCheck %s
52 %tmp21 = call x86_mmx @llvm.x86.mmx.padd.q (x86_mmx %tmp19, x86_mmx %tmp14) ; <x86_mmx> [#uses=1]
53 …%tmp22 = call x86_mmx @llvm.x86.mmx.padd.q (x86_mmx %tmp21, x86_mmx %sum.035.0) ; <x86_mmx> [#use…
64 declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx)
D2007-05-15-maskmovq.ll10 tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp4, x86_mmx %tmp6, i8* %P )
14 declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, i8*)
Dmmx-copy-gprs.ll6 ; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs,
D2011-06-14-mmx-inlineasm.ll1 ; RUN: llc -mcpu=i686 -mattr=+mmx < %s | FileCheck %s
38 tail call void @llvm.x86.mmx.emms() nounwind
42 declare void @llvm.x86.mmx.emms() nounwind
D2008-09-05-sinttofp-2xi32.ll1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx | not grep unpcklpd
2 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx | not grep unpckhpd
D2008-08-23-64Bit-maskmovq.ll22 tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp, x86_mmx %tmp2, i8* null ) nounwind
29 declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, i8*) nounwind
/external/valgrind/main/memcheck/tests/x86/
Dxor-undef-x86.stdout.exp6 Complain mmx
8 No complain mmx
Dinsn_mmx.vgtest2 prereq: ../../../tests/x86_amd64_features x86-mmx
/external/valgrind/main/memcheck/tests/amd64/
Dxor-undef-amd64.stdout.exp6 Complain mmx
8 No complain mmx
/external/clang/lib/Headers/
Dmodule.map23 explicit module mmx {
24 requires mmx
30 export mmx
/external/llvm/test/Transforms/InstCombine/
Dpr2645-1.ll34 call void @llvm.x86.mmx.emms( )
39 declare void @llvm.x86.mmx.emms( )
/external/valgrind/main/none/tests/x86/
Dinsn_mmx.vgtest2 prereq: ../../../tests/x86_amd64_features x86-mmx

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