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Searched refs:msr (Results 1 – 25 of 31) sorted by relevance

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/external/llvm/test/MC/ARM/
Dthumb2-mclass.s46 msr apsr, r0
47 msr iapsr, r0
48 msr eapsr, r0
49 msr xpsr, r0
50 msr ipsr, r0
51 msr epsr, r0
52 msr iepsr, r0
53 msr msp, r0
54 msr psp, r0
55 msr primask, r0
[all …]
Dbasic-arm-instructions.s982 msr apsr, #5
983 msr apsr_g, #5
984 msr apsr_nzcvq, #5
985 msr APSR_nzcvq, #5
986 msr apsr_nzcvqg, #5
987 msr cpsr_fc, #5
988 msr cpsr_c, #5
989 msr cpsr_x, #5
990 msr cpsr_fc, #5
991 msr cpsr_all, #5
[all …]
Dbasic-thumb2-instructions.s1257 msr apsr, r1
1258 msr apsr_g, r2
1259 msr apsr_nzcvq, r3
1260 msr APSR_nzcvq, r4
1261 msr apsr_nzcvqg, r5
1262 msr cpsr_fc, r6
1263 msr cpsr_c, r7
1264 msr cpsr_x, r8
1265 msr cpsr_fc, r9
1266 msr cpsr_all, r11
[all …]
/external/kernel-headers/original/asm-x86/
Dmsr.h17 static inline unsigned long long native_read_msr(unsigned int msr) in native_read_msr() argument
21 asm volatile("rdmsr" : "=A" (val) : "c" (msr)); in native_read_msr()
25 static inline unsigned long long native_read_msr_safe(unsigned int msr, in native_read_msr_safe() argument
40 : "c" (msr), "i" (-EFAULT)); in native_read_msr_safe()
45 static inline void native_write_msr(unsigned int msr, unsigned long long val) in native_write_msr() argument
47 asm volatile("wrmsr" : : "c" (msr), "A"(val)); in native_write_msr()
50 static inline int native_write_msr_safe(unsigned int msr, in native_write_msr_safe() argument
64 : "c" (msr), "0" ((u32)val), "d" ((u32)(val>>32)), in native_write_msr_safe()
93 #define rdmsr(msr,val1,val2) \ argument
95 u64 __val = native_read_msr(msr); \
[all …]
Dparavirt.h117 u64 (*read_msr)(unsigned int msr, int *err);
118 int (*write_msr)(unsigned int msr, u64 val);
560 static inline u64 paravirt_read_msr(unsigned msr, int *err) in paravirt_read_msr() argument
562 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err); in paravirt_read_msr()
564 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high) in paravirt_write_msr() argument
566 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high); in paravirt_write_msr()
570 #define rdmsr(msr,val1,val2) do { \ argument
572 u64 _l = paravirt_read_msr(msr, &_err); \
577 #define wrmsr(msr,val1,val2) do { \ argument
578 paravirt_write_msr(msr, val1, val2); \
[all …]
/external/libgsm/src/
Ddecode.c24 register word msr = S->msr; variable
29 tmp = GSM_MULT_R( msr, 28180 );
30 msr = GSM_ADD(*s, tmp); /* Deemphasis */
31 *s = GSM_ADD(msr, msr) & 0xFFF8; /* Truncation & Upscaling */
33 S->msr = msr;
/external/valgrind/main/none/tests/s390x/
Dmul.stdout.exp89 msr 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000
90 msr 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001
91 msr 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF
92 msr 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF
93 msr 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000
94 msr 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF
95 msr 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000
96 msr 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF
97 msr FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFFFFFFFFFF
98 msr 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000
[all …]
Dmul.c28 regsweep(msr, m2); in do_regmem_insns()
/external/oprofile/module/x86/
Dop_msr.h19 #define wrmsr(msr, val1, val2) \ argument
23 : "c" (msr), "a" (val1), "d" (val2) \
/external/llvm/test/MC/Disassembler/ARM/
Dthumb-MSR-MClass.txt3 # CHECK: msr primask, r0
Dbasic-arm-instructions.txt747 # CHECK: msr CPSR_fc, #5
748 # CHECK: msr APSR_g, #5
749 # CHECK: msr APSR_nzcvq, #5
750 # CHECK: msr APSR_nzcvq, #5
751 # CHECK: msr APSR_nzcvqg, #5
752 # CHECK: msr CPSR_fc, #5
753 # CHECK: msr CPSR_c, #5
754 # CHECK: msr CPSR_x, #5
755 # CHECK: msr CPSR_fc, #5
756 # CHECK: msr CPSR_fc, #5
[all …]
Dthumb-tests.txt134 # CHECK: msr CPSR_fc, r0
299 # CHECK: msr CPSR_fc, r0
Dthumb2.txt1001 # CHECK: msr APSR_nzcvq, r1
1002 # CHECK: msr APSR_g, r2
1003 # CHECK: msr APSR_nzcvq, r3
1004 # CHECK: msr APSR_nzcvq, r4
1005 # CHECK: msr APSR_nzcvqg, r5
1006 # CHECK: msr CPSR_fc, r6
1007 # CHECK: msr CPSR_c, r7
1008 # CHECK: msr CPSR_x, r8
1009 # CHECK: msr CPSR_fc, r9
1010 # CHECK: msr CPSR_fc, r11
[all …]
Darm-tests.txt164 # CHECK: msr CPSR_fc, r0
/external/qemu-pc-bios/vgabios/tests/
Dtestbios.c27 Bit16u msr; member
277 biosarea->msr=peekb(0x40,0x65); in read_bios_area()
303 printf("msr : %04x\n",biosarea->msr); in show_bios_area()
/external/libgsm/inc/
Dprivate.h34 word msr; /* decoder.c, Postprocessing */ member
/external/valgrind/main/include/vki/
Dvki-ppc32-linux.h206 unsigned long msr; member
Dvki-ppc64-linux.h200 VKI_PPC_REG msr; member
/external/valgrind/main/coregrind/m_coredump/
Dcoredump-elf.c305 regs->msr = 0xf032; /* pretty arbitrary */ in fill_prstatus()
326 regs->msr = 0xf032; /* pretty arbitrary */ in fill_prstatus()
/external/elfutils/tests/
Drun-allregs.sh197 66: msr (msr), unsigned 32 bits
1220 66: msr (msr), unsigned 64 bits
/external/qemu/
Dcpu-exec.c971 # define MSR_sig(context) REG_sig(msr, context) /* Machine State Register (Supervisor) */
DChangelog37 - v2: properly save kvm system time msr registers (Glauber Costa)
Dgdbstub.c652 case 65: GET_REGL(env->msr); in cpu_gdb_read_register()
/external/v8/src/arm/
Dassembler-arm.h918 void msr(SRegisterFieldMask fields, const Operand& src, Condition cond = al);
Dassembler-arm.cc1374 void Assembler::msr(SRegisterFieldMask fields, const Operand& src, in msr() function in v8::internal::Assembler
1387 msr(fields, Operand(ip), cond); in msr()

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