Home
last modified time | relevance | path

Searched refs:setgt (Results 1 – 13 of 13) sorted by relevance

/external/clang/test/CodeGen/
DBasicInstrs.c23 _Bool setgt(int X, int Y) { in setgt() function
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfoV3.td99 [(set DoubleRegs:$dst, (select (i1 (setgt DoubleRegs:$src2,
124 //def : Pat <(brcond (i1 (setgt IntRegs:$src1, -1)), bb:$offset),
DHexagonSelectCCInfo.td100 // setgt-64.
111 // setlt-64 -> setgt-64.
DHexagonInstrInfoV4.td3401 [(set PredRegs:$dst, (setgt (shl IntRegs:$src1, (i32 24)),
3410 [(set PredRegs:$dst, (setgt (shl IntRegs:$src1, (i32 24)),
3478 [(set PredRegs:$dst, (setgt (shl IntRegs:$src1, (i32 16)),
3488 [(set PredRegs:$dst, (setgt (shl IntRegs:$src1, (i32 16)),
DHexagonInstrInfo.td549 defm CMPGT : CMP32_rr_ri_s10<"cmp.gt", setgt>;
585 defm CMPGT64 : CMP64_rr<"cmp.gt", setgt>;
616 [(set IntRegs:$dst, (select (i1 (setgt IntRegs:$src2,
/external/llvm/lib/Target/CellSPU/
DSPU64InstrInfo.td175 // i64 setgt/setle:
216 def : Pat<(setgt R64C:$rA, R64C:$rB), I64GTr64.Fragment>;
217 //def : Pat<(setgt (v2i64 VECREG:$rA), (v2i64 VECREG:$rB)),
DSPUInstrInfo.td3023 [(set (v16i8 VECREG:$rT), (setgt (v8i16 VECREG:$rA),
3028 [(set R8C:$rT, (setgt R8C:$rA, R8C:$rB))]>;
3039 [(set (v16i8 VECREG:$rT), (setgt (v16i8 VECREG:$rA),
3043 [(set R8C:$rT, (setgt R8C:$rA, immSExt8:$val))]>;
3053 [(set (v8i16 VECREG:$rT), (setgt (v8i16 VECREG:$rA),
3057 [(set R16C:$rT, (setgt R16C:$rA, R16C:$rB))]>;
3068 (setgt (v8i16 VECREG:$rA),
3071 [(set R16C:$rT, (setgt R16C:$rA, i16ImmSExt10:$val))]>;
3082 (setgt (v4i32 VECREG:$rA), (v4i32 VECREG:$rB)))]>;
3085 [(set R32C:$rT, (setgt R32C:$rA, R32C:$rB))]>;
[all …]
/external/clang/www/demo/
Dindex.cgi99 …$input =~ s@\b(add|sub|mul|div|rem|and|or|xor|setne|seteq|setlt|setgt|setle|setge|phi|tail|call|ca…
/external/llvm/lib/Target/XCore/
DXCoreInstrInfo.td1173 def : Pat<(setgt GRRegs:$lhs, GRRegs:$rhs),
1237 // setge X, 0 is canonicalized to setgt X, -1
1238 def : Pat<(brcond (setgt GRRegs:$lhs, -1), bb:$dst),
1244 def : Pat<(select (setgt GRRegs:$lhs, -1), GRRegs:$T, GRRegs:$F),
1247 def : Pat<(setgt GRRegs:$lhs, -1),
/external/llvm/lib/Target/Mips/
DMips64InstrInfo.td155 def BGTZ64 : CBranchZero<0x07, 0, "bgtz", setgt, CPU64Regs>;
DMipsInstrInfo.td937 def BGTZ : CBranchZero<0x07, 0, "bgtz", setgt, CPURegs>;
1157 def : Pat<(setgt RC:$lhs, RC:$rhs),
/external/llvm/test/Transforms/InstCombine/
Dcast.ll121 ; %X = setlt sbyte %c, 0 ; setgt %A, 127
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td846 def setgt : PatFrag<(ops node:$lhs, node:$rhs),