Home
last modified time | relevance | path

Searched refs:setlt (Results 1 – 17 of 17) sorted by relevance

/external/clang/test/CodeGen/
DBasicInstrs.c19 _Bool setlt(int X, int Y) { in setlt() function
/external/llvm/test/Transforms/LoopStrengthReduce/
Ddont-hoist-simple-loop-constants.ll4 ; The setlt wants to use a value that is incremented one more than the dominant
/external/llvm/test/Transforms/InstCombine/
Dsetcc-strength-reduce.ll2 ; working. Basically this boils down to converting setlt,gt,le,ge instructions
Dcast.ll121 ; %X = setlt sbyte %c, 0 ; setgt %A, 127
/external/llvm/test/CodeGen/PowerPC/
Dppc-vaarg-agg.ll44 ; with an error like: Cannot select: ch = setlt [ID=6]
/external/llvm/lib/Target/Mips/
DMips64InstrInfo.td86 def SLTi64 : SetCC_I<0x0a, "slti", setlt, simm16_64, immSExt16, CPU64Regs>;
95 def SLT64 : SetCC_R<0x00, 0x2a, "slt", setlt, CPU64Regs>;
157 def BLTZ64 : CBranchZero<0x01, 0, "bltz", setlt, CPU64Regs>;
DMipsInstrInfo.td851 def SLTi : SetCC_I<0x0a, "slti", setlt, simm16, immSExt16, CPURegs>;
863 def SLT : SetCC_R<0x00, 0x2a, "slt", setlt, CPURegs>;
939 def BLTZ : CBranchZero<0x01, 0, "bltz", setlt, CPURegs>;
/external/llvm/lib/Target/CellSPU/
DSPU64InstrInfo.td225 // i64 setge/setlt:
253 def : I64SETCCNegCond<setlt, I64GEr64>;
254 def : I64SELECTNegCond<setlt, I64GEr64>;
DSPUInstrInfo.td3220 // For SETCC primitives not supported above (setlt, setle, setge, etc.)
3268 def : SETCCBinOpReg<setlt, R8C, NORr8, CGTBr8, CEQBr8>;
3269 def : SETCCBinOpImm<setlt, R8C, immSExt8, i8, NORr8, CGTBIr8, CEQBIr8>;
3278 def : SETCCBinOpReg<setlt, R16C, NORr16, CGTHr16, CEQHr16>;
3279 def : SETCCBinOpImm<setlt, R16C, i16ImmSExt10, i16, NORr16, CGTHIr16, CEQHIr16>;
3288 def : SETCCBinOpReg<setlt, R32C, NORr32, CGTr32, CEQr32>;
3289 def : SETCCBinOpImm<setlt, R32C, i32ImmSExt10, i32, NORr32, CGTIr32, CEQIr32>;
3707 defm BRCONDlt : BranchCondGTEQ<setlt, ORr16, BRHZr16, ORr32, BRZr32>;
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfoV3.td89 [(set DoubleRegs:$dst, (select (i1 (setlt DoubleRegs:$src2,
DHexagonSelectCCInfo.td111 // setlt-64 -> setgt-64.
DHexagonInstrInfo.td550 defm CMPLT : CMP32_rr<"cmp.lt", setlt>;
609 [(set IntRegs:$dst, (select (i1 (setlt IntRegs:$src2,
2470 // Map from p0 = setlt(r0, r1) r2 = mux(p0, r3, r4) =>
2472 def : Pat <(select (i1 (setlt IntRegs:$src1, IntRegs:$src2)), IntRegs:$src3,
2695 def : Pat <(brcond (i1 (setlt IntRegs:$src1, s8ImmPred:$src2)), bb:$offset),
2698 def : Pat <(brcond (i1 (setlt IntRegs:$src1, IntRegs:$src2)), bb:$offset),
2831 def : Pat <(i1 (setlt IntRegs:$src1, s8ImmPred:$src2)),
2836 def : Pat <(i1 (setlt IntRegs:$src1, IntRegs:$src2)),
2841 def : Pat <(i1 (setlt DoubleRegs:$src1, DoubleRegs:$src2)),
/external/clang/www/demo/
Dindex.cgi99 …$input =~ s@\b(add|sub|mul|div|rem|and|or|xor|setne|seteq|setlt|setgt|setle|setge|phi|tail|call|ca…
/external/llvm/lib/Target/XCore/
DXCoreInstrInfo.td1183 def : Pat<(setlt GRRegs:$lhs, GRRegs:$rhs),
1234 def : Pat<(brcond (setlt GRRegs:$lhs, 0), bb:$dst),
1241 def : Pat<(select (setlt GRRegs:$lhs, 0), GRRegs:$T, GRRegs:$F),
/external/llvm/lib/Target/X86/
DREADME-SSE.txt100 %C = setlt double %A, %B
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td850 def setlt : PatFrag<(ops node:$lhs, node:$rhs),
/external/llvm/lib/Target/
DREADME.txt41 Shrink: (setlt (loadi32 P), 0) -> (setlt (loadi8 Phi), 0)