| /external/llvm/test/CodeGen/X86/ |
| D | 2006-01-19-ISelFoldingBug.ll | 2 ; RUN: grep shld | count 1
4 ; Check that the isel does not fold the shld, which already folds a load
|
| D | shift-coalesce.ll | 2 ; RUN: grep {shld.*CL}
|
| D | rot64.ll | 4 ; RUN: grep shld %t | count 2
|
| /external/llvm/test/MC/X86/ |
| D | x86-64.s | 357 shld %bx, %dx label
358 shld %cl, %bx, %dx label
359 shld $1, %bx, %dx label
360 shld %bx, (%rax) label
361 shld %cl, %bx, (%rax) label
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrShiftRotate.td | 686 "shld{w}\t{%cl, $src2, $dst|$dst, $src2, CL}",
698 "shld{l}\t{%cl, $src2, $dst|$dst, $src2, CL}",
708 "shld{q}\t{%cl, $src2, $dst|$dst, $src2, CL}",
724 "shld{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}",
738 "shld{l}\t{$src3, $src2, $dst|$dst, $src2, $src3}",
752 "shld{q}\t{$src3, $src2, $dst|$dst, $src2, $src3}",
768 "shld{w}\t{%cl, $src2, $dst|$dst, $src2, CL}",
777 "shld{l}\t{%cl, $src2, $dst|$dst, $src2, CL}",
786 "shld{q}\t{%cl, $src2, $dst|$dst, $src2, CL}",
797 "shld{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}",
[all …]
|
| D | X86InstrInfo.td | 1863 // shld/shrd op,op -> shld op, op, CL
|
| D | README.txt | 1497 sra, srl, shld, shrd, atomic ops, and others. It is also currently not done
|
| /external/flac/libFLAC/ia32/ |
| D | bitreader_asm.nasm | 407 shld edi, edx, cl
422 shld edi, edx, cl
485 shld edi, eax, cl
505 shld edi, eax, cl
529 shld edi, eax, cl ; uval <<= parameter <<< 'parameter' bits of tail word
|
| /external/v8/test/cctest/ |
| D | test-disasm-x64.cc | 120 __ shld(rdx, rcx); in TEST() local
193 __ shld(rdx, rbx); in TEST() local
|
| D | test-disasm-ia32.cc | 126 __ shld(edx, ecx); in TEST() local
205 __ shld(edx, Operand(ebx, ecx, times_4, 10000)); in TEST() local
|
| /external/v8/src/ia32/ |
| D | assembler-ia32.h | 813 void shld(Register dst, Register src) { shld(dst, Operand(src)); } in shld() function
814 void shld(Register dst, const Operand& src);
|
| D | assembler-ia32.cc | 1096 void Assembler::shld(Register dst, const Operand& src) { in shld() function in v8::internal::Assembler
|
| /external/valgrind/main/docs/internals/ |
| D | 3_1_BUGSTATUS.txt | 68 vx1615 fixed 126583 amd64->IR: 0x48 0xF 0xA4 0xC2 (shld $1,%rax,%rdx)
|
| /external/qemu/distrib/sdl-1.2.12/src/stdlib/ |
| D | SDL_stdlib.c | 580 shld edx,eax,cl in _allshl()
|
| /external/openssl/crypto/aes/asm/ |
| D | aesni-sha1-x86_64.pl | 644 my $_rol=sub { &shld(@_[0],@_) };
|
| /external/openssl/crypto/sha/asm/ |
| D | sha1-x86_64.pl | 722 my $_rol=sub { &shld(@_[0],@_) };
|
| D | sha1-586.pl | 864 my $_rol=sub { &shld(@_[0],@_) };
|
| /external/valgrind/main/VEX/test/ |
| D | test-i386.c | 131 #define OP shld
|
| D | test-amd64.c | 142 #define OP shld
|
| /external/elfutils/libcpu/defs/ |
| D | i386 | 515 00001111,10100100,{mod}{reg}{r_m},{imm8}:shld {imm8},{reg},{mod}{r_m}
516 00001111,10100101,{mod}{reg}{r_m}:shld %cl,{reg},{mod}{r_m}
|
| /external/v8/src/x64/ |
| D | assembler-x64.h | 1013 void shld(Register dst, Register src);
|
| D | assembler-x64.cc | 1945 void Assembler::shld(Register dst, Register src) { in shld() function in v8::internal::Assembler
|
| /external/qemu/ |
| D | Changelog | 529 - fixed shrd, shld, idivl and divl on PowerPC.
|
| /external/elfutils/tests/ |
| D | testfile44.expect.bz2 | |
| D | testfile45.expect.bz2 | 1testfile45.o: elf64-elf_x86_64
2
3Disassembly of section .text:
4
5 0 ... |