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Searched defs:RM (Results 1 – 25 of 57) sorted by relevance

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/external/valgrind/main/none/tests/arm/
Dv6intARM.c9 #define TESTINST2(instruction, RMval, RD, RM, carryin) \ argument
41 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
70 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
100 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, carryin) \ argument
859 #define TESTINST2(instruction, RMval, RD, RM, carryin) \ argument
891 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
920 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
950 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, carryin) \ argument
Dv6media.c18 #define TESTINST2(instruction, RMval, RD, RM, carryin) \ argument
50 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
79 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
109 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, carryin) \ argument
4109 #define TESTINST2(instruction, RMval, RD, RM, carryin) \ argument
4141 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \ argument
4170 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \ argument
4200 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, carryin) \ argument
Dv6intThumb.c74 #define TESTINST2(instruction, RMval, RD, RM, cvin) \ argument
106 #define TESTINST2x(instruction, RDval, RMval, RD, RM, cvin) \ argument
135 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, cvin) \ argument
162 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, cvin) \ argument
190 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, cvin) \ argument
5947 #define TESTINST2(instruction, RMval, RD, RM, cvin) \ argument
5979 #define TESTINST2x(instruction, RDval, RMval, RD, RM, cvin) \ argument
6008 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, cvin) \ argument
6035 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, cvin) \ argument
6063 #define TESTINST4_2OUT(instruction, RDval, RD2val, RMval, RSval, RD, RD2, RM, RS, cvin) \ argument
/external/llvm/lib/Target/Mips/
DMipsTargetMachine.cpp39 Reloc::Model RM, CodeModel::Model CM, in MipsTargetMachine()
61 Reloc::Model RM, CodeModel::Model CM, in MipsebTargetMachine()
70 Reloc::Model RM, CodeModel::Model CM, in MipselTargetMachine()
79 Reloc::Model RM, CodeModel::Model CM, in Mips64ebTargetMachine()
88 Reloc::Model RM, CodeModel::Model CM, in Mips64elTargetMachine()
/external/llvm/lib/Target/Sparc/
DSparcTargetMachine.cpp31 Reloc::Model RM, CodeModel::Model CM, in SparcTargetMachine()
81 Reloc::Model RM, in SparcV8TargetMachine()
93 Reloc::Model RM, in SparcV9TargetMachine()
/external/llvm/lib/Target/PowerPC/
DPPCTargetMachine.cpp33 Reloc::Model RM, CodeModel::Model CM, in PPCTargetMachine()
53 Reloc::Model RM, CodeModel::Model CM, in PPC32TargetMachine()
63 Reloc::Model RM, CodeModel::Model CM, in PPC64TargetMachine()
/external/llvm/lib/MC/
DMCCodeGenInfo.cpp18 void MCCodeGenInfo::InitMCCodeGenInfo(Reloc::Model RM, CodeModel::Model CM, in InitMCCodeGenInfo()
/external/llvm/lib/Target/ARM/
DARMTargetMachine.cpp43 Reloc::Model RM, CodeModel::Model CM, in ARMBaseTargetMachine()
59 Reloc::Model RM, CodeModel::Model CM, in ARMTargetMachine()
85 Reloc::Model RM, CodeModel::Model CM, in ThumbTargetMachine()
/external/llvm/lib/Target/X86/
DX86TargetMachine.cpp36 Reloc::Model RM, CodeModel::Model CM, in X86_32TargetMachine()
59 Reloc::Model RM, CodeModel::Model CM, in X86_64TargetMachine()
75 Reloc::Model RM, CodeModel::Model CM, in X86TargetMachine()
/external/llvm/lib/Target/PTX/
DPTXTargetMachine.cpp74 Reloc::Model RM, CodeModel::Model CM, in PTXTargetMachine()
91 Reloc::Model RM, CodeModel::Model CM, in PTX32TargetMachine()
101 Reloc::Model RM, CodeModel::Model CM, in PTX64TargetMachine()
/external/libvpx/vp8/encoder/
Dpickinter.h17 #define RD_ESTIMATE(RM,DM,R,D) ( ((128+(R)*(RM)) >> 8) + (DM)*(D) ) argument
/external/libpng/contrib/pngminim/encoder/
Dmakefile8 RM=rm -f macro
/external/libpng/contrib/pngminim/decoder/
Dmakefile8 RM=rm -f macro
/external/libpng/contrib/pngminim/preader/
Dmakefile8 RM=rm -f macro
/external/clang/lib/StaticAnalyzer/Checkers/
DBuiltinFunctionChecker.cpp56 MemRegionManager& RM = C.getStoreManager().getRegionManager(); in evalCall() local
/external/llvm/lib/Target/XCore/
DXCoreTargetMachine.cpp26 Reloc::Model RM, CodeModel::Model CM, in XCoreTargetMachine()
/external/llvm/lib/Target/MBlaze/
DMBlazeTargetMachine.cpp37 Reloc::Model RM, CodeModel::Model CM, in MBlazeTargetMachine()
/external/llvm/lib/Target/MSP430/
DMSP430TargetMachine.cpp32 Reloc::Model RM, CodeModel::Model CM, in MSP430TargetMachine()
/external/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcMCTargetDesc.cpp53 static MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM, in createSparcMCCodeGenInfo()
/external/llvm/lib/Target/CellSPU/
DSPUTargetMachine.cpp37 Reloc::Model RM, CodeModel::Model CM, in SPUTargetMachine()
/external/llvm/lib/Target/XCore/MCTargetDesc/
DXCoreMCTargetDesc.cpp64 static MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM, in createXCoreMCCodeGenInfo()
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCTargetDesc.cpp66 static MCCodeGenInfo *createHexagonMCCodeGenInfo(StringRef TT, Reloc::Model RM, in createHexagonMCCodeGenInfo()
/external/llvm/lib/Target/CellSPU/MCTargetDesc/
DSPUMCTargetDesc.cpp65 static MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, in createSPUMCCodeGenInfo()
/external/llvm/lib/Target/Hexagon/
DHexagonTargetMachine.cpp54 Reloc::Model RM, in HexagonTargetMachine()
/external/llvm/lib/Target/MSP430/MCTargetDesc/
DMSP430MCTargetDesc.cpp53 static MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM, in createMSP430MCCodeGenInfo()

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