Lines Matching refs:lowReg
91 opRegRegImm(cUnit, kOpAdd, rlResult.lowReg, in genNegFloat()
92 rlSrc.lowReg, 0x80000000); in genNegFloat()
104 genRegCopy(cUnit, rlResult.lowReg, rlSrc.lowReg); in genNegDouble()
138 opRegReg(cUnit, firstOp, rlResult.lowReg, rlSrc2.lowReg); in genLong3Addr()
145 opRegReg(cUnit, firstOp, rlSrc1.lowReg, rlResult.lowReg); in genLong3Addr()
148 dvmCompilerClobber(cUnit, rlResult.lowReg); in genLong3Addr()
150 dvmCompilerClobber(cUnit, rlSrc1.lowReg); in genLong3Addr()
160 loadValueDirectWide(cUnit, rlSrc1, rlResult.lowReg, in genLong3Addr()
163 opRegReg(cUnit, firstOp, rlResult.lowReg, rlSrc2.lowReg); in genLong3Addr()
219 int reg0 = loadValue(cUnit, rlSrc, kCoreReg).lowReg; in genInlinedAbsFloat()
235 int reglo = regSrc.lowReg; in genInlinedAbsDouble()
254 int reg0 = loadValue(cUnit, rlSrc1, kCoreReg).lowReg; in genInlinedMinMaxInt()
255 int reg1 = loadValue(cUnit, rlSrc2, kCoreReg).lowReg; in genInlinedMinMaxInt()
275 opRegRegImm(cUnit, kOpMul, rlResult.lowReg, rlSrc.lowReg, lit); in genMultiplyByTwoBitMultiplier()