Lines Matching refs:lowReg
34 dvmCompilerFlushRegWideForV5TEVFP(cUnit, rlSrc.lowReg, in loadValueAddress()
37 dvmCompilerFlushRegForV5TEVFP(cUnit, rlSrc.lowReg); in loadValueAddress()
107 newLIR3(cUnit, (MipsOpCode)op, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg); in genArithOpFloat()
151 dvmCompilerClobber(cUnit, rlDest.lowReg); in genArithOpFloat()
197 newLIR3(cUnit, (MipsOpCode)op, S2D(rlResult.lowReg, rlResult.highReg), in genArithOpDouble()
198 S2D(rlSrc1.lowReg, rlSrc1.highReg), in genArithOpDouble()
199 S2D(rlSrc2.lowReg, rlSrc2.highReg)); in genArithOpDouble()
239 dvmCompilerClobber(cUnit, rlDest.lowReg); in genArithOpDouble()
292 srcReg = S2D(rlSrc.lowReg, rlSrc.highReg); in genConversion()
296 srcReg = rlSrc.lowReg; in genConversion()
301 newLIR2(cUnit, (MipsOpCode)op, S2D(rlResult.lowReg, rlResult.highReg), srcReg); in genConversion()
306 newLIR2(cUnit, (MipsOpCode)op, rlResult.lowReg, srcReg); in genConversion()
373 dvmCompilerClobber(cUnit, rlDest.lowReg); in genConversion()