Lines Matching refs:MCOperand
1035 BrInst.addOperand(MCOperand::CreateExpr(MBBSymbolExpr)); in EmitJump2Table()
1036 BrInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitJump2Table()
1037 BrInst.addOperand(MCOperand::CreateReg(0)); in EmitJump2Table()
1087 Inst.addOperand(MCOperand::CreateReg(Dest)); in populateADROperands()
1088 Inst.addOperand(MCOperand::CreateExpr(SymbolExpr)); in populateADROperands()
1090 Inst.addOperand(MCOperand::CreateImm(pred)); in populateADROperands()
1091 Inst.addOperand(MCOperand::CreateReg(ccreg)); in populateADROperands()
1312 TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); in EmitInstruction()
1313 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1315 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1316 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1318 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1324 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1333 TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); in EmitInstruction()
1334 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1336 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1337 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1343 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1345 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1346 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1355 TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); in EmitInstruction()
1356 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1358 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1359 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1361 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1367 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1368 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1370 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1371 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1373 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1382 TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); in EmitInstruction()
1383 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1385 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1386 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1388 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1397 TmpInst.addOperand(MCOperand::CreateExpr(GVSymExpr)); in EmitInstruction()
1399 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1400 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1409 TmpInst.addOperand(MCOperand::CreateReg(ARM::LR)); in EmitInstruction()
1410 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1412 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1413 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1422 TmpInst.addOperand(MCOperand::CreateExpr(GVSymExpr)); in EmitInstruction()
1424 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1425 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1434 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1452 TmpInst.addOperand(MCOperand::CreateExpr(PCRelExpr)); in EmitInstruction()
1455 TmpInst.addOperand(MCOperand::CreateExpr(RefExpr)); in EmitInstruction()
1459 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1460 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1462 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1471 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1472 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); in EmitInstruction()
1490 TmpInst.addOperand(MCOperand::CreateExpr(PCRelExpr)); in EmitInstruction()
1493 TmpInst.addOperand(MCOperand::CreateExpr(RefExpr)); in EmitInstruction()
1496 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1497 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1499 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1517 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1518 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1519 AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1521 AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1522 AddInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1540 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1541 AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1542 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); in EmitInstruction()
1544 AddInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm())); in EmitInstruction()
1545 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg())); in EmitInstruction()
1547 AddInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1586 LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1587 LdStInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1588 LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); in EmitInstruction()
1589 LdStInst.addOperand(MCOperand::CreateImm(0)); in EmitInstruction()
1591 LdStInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm())); in EmitInstruction()
1592 LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg())); in EmitInstruction()
1625 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1626 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1628 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1629 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1640 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1641 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1643 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1644 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1657 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1658 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1660 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1661 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1675 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1676 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1678 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1679 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1682 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1700 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1701 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1702 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm())); in EmitInstruction()
1705 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1706 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1707 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); in EmitInstruction()
1708 TmpInst.addOperand(MCOperand::CreateImm(0)); in EmitInstruction()
1711 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1712 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1724 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1725 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1726 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); in EmitInstruction()
1728 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1729 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1731 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1779 TmpInst.addOperand(MCOperand::CreateReg(ValReg)); in EmitInstruction()
1780 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1782 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1783 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1790 TmpInst.addOperand(MCOperand::CreateReg(ValReg)); in EmitInstruction()
1792 TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); in EmitInstruction()
1793 TmpInst.addOperand(MCOperand::CreateReg(ValReg)); in EmitInstruction()
1794 TmpInst.addOperand(MCOperand::CreateImm(7)); in EmitInstruction()
1796 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1797 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1803 TmpInst.addOperand(MCOperand::CreateReg(ValReg)); in EmitInstruction()
1804 TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); in EmitInstruction()
1807 TmpInst.addOperand(MCOperand::CreateImm(1)); in EmitInstruction()
1809 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1810 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1816 TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); in EmitInstruction()
1817 TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); in EmitInstruction()
1818 TmpInst.addOperand(MCOperand::CreateImm(0)); in EmitInstruction()
1820 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1821 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1828 TmpInst.addOperand(MCOperand::CreateExpr(SymbolExpr)); in EmitInstruction()
1829 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1830 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1836 TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); in EmitInstruction()
1837 TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR)); in EmitInstruction()
1838 TmpInst.addOperand(MCOperand::CreateImm(1)); in EmitInstruction()
1840 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1841 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1863 TmpInst.addOperand(MCOperand::CreateReg(ValReg)); in EmitInstruction()
1864 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1865 TmpInst.addOperand(MCOperand::CreateImm(8)); in EmitInstruction()
1867 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1868 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1870 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1877 TmpInst.addOperand(MCOperand::CreateReg(ValReg)); in EmitInstruction()
1878 TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); in EmitInstruction()
1879 TmpInst.addOperand(MCOperand::CreateImm(4)); in EmitInstruction()
1881 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1882 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1888 TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); in EmitInstruction()
1889 TmpInst.addOperand(MCOperand::CreateImm(0)); in EmitInstruction()
1891 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1892 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1894 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1900 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1901 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1902 TmpInst.addOperand(MCOperand::CreateImm(0)); in EmitInstruction()
1904 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1905 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1907 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1913 TmpInst.addOperand(MCOperand::CreateReg(ARM::R0)); in EmitInstruction()
1914 TmpInst.addOperand(MCOperand::CreateImm(1)); in EmitInstruction()
1916 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1917 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1919 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1935 TmpInst.addOperand(MCOperand::CreateReg(ARM::SP)); in EmitInstruction()
1936 TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); in EmitInstruction()
1937 TmpInst.addOperand(MCOperand::CreateImm(8)); in EmitInstruction()
1939 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1940 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1946 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); in EmitInstruction()
1947 TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); in EmitInstruction()
1948 TmpInst.addOperand(MCOperand::CreateImm(4)); in EmitInstruction()
1950 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1951 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1957 TmpInst.addOperand(MCOperand::CreateReg(ARM::R7)); in EmitInstruction()
1958 TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); in EmitInstruction()
1959 TmpInst.addOperand(MCOperand::CreateImm(0)); in EmitInstruction()
1961 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1962 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1968 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); in EmitInstruction()
1970 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1971 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1987 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); in EmitInstruction()
1988 TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); in EmitInstruction()
1991 TmpInst.addOperand(MCOperand::CreateImm(2)); in EmitInstruction()
1993 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1994 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
2000 TmpInst.addOperand(MCOperand::CreateReg(ARM::SP)); in EmitInstruction()
2001 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); in EmitInstruction()
2003 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
2004 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
2010 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); in EmitInstruction()
2011 TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); in EmitInstruction()
2012 TmpInst.addOperand(MCOperand::CreateImm(1)); in EmitInstruction()
2014 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
2015 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
2021 TmpInst.addOperand(MCOperand::CreateReg(ARM::R7)); in EmitInstruction()
2022 TmpInst.addOperand(MCOperand::CreateReg(SrcReg)); in EmitInstruction()
2023 TmpInst.addOperand(MCOperand::CreateImm(0)); in EmitInstruction()
2025 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
2026 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
2032 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); in EmitInstruction()
2034 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
2035 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()