274   SDNode *QuadSRegs(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
275   SDNode *QuadDRegs(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
276   SDNode *QuadQRegs(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
1480                                    SDValue V2, SDValue V3) {  in QuadSRegs()  argument
1489                                     V2, SubReg2, V3, SubReg3 };  in QuadSRegs()
1496                                    SDValue V2, SDValue V3) {  in QuadDRegs()  argument
1504                                     V2, SubReg2, V3, SubReg3 };  in QuadDRegs()
1511                                    SDValue V2, SDValue V3) {  in QuadQRegs()  argument
1519                                     V2, SubReg2, V3, SubReg3 };  in QuadQRegs()
1788         SDValue V3 = (NumVecs == 3)  in SelectVST()  local
1791         SrcReg = SDValue(QuadDRegs(MVT::v4i64, V0, V1, V2, V3), 0);  in SelectVST()
1836   SDValue V3 = (NumVecs == 3)  in SelectVST()  local
1839   SDValue RegSeq = SDValue(QuadQRegs(MVT::v8i64, V0, V1, V2, V3), 0);  in SelectVST()
1954     SDValue V3 = (NumVecs == 3)  in SelectVLDSTLane()  local
1958       SuperReg = SDValue(QuadDRegs(MVT::v4i64, V0, V1, V2, V3), 0);  in SelectVLDSTLane()
1960       SuperReg = SDValue(QuadQRegs(MVT::v8i64, V0, V1, V2, V3), 0);  in SelectVLDSTLane()
2091     SDValue V3 = (NumVecs == 3)  in SelectVTBL()  local
2094     RegSeq = SDValue(QuadDRegs(MVT::v4i64, V0, V1, V2, V3), 0);  in SelectVTBL()