Lines Matching refs:getKillRegState

339       .addReg(Base, getKillRegState(BaseKill)).addImm(Offset)  in MergeOps()
350     .addReg(Base, getKillRegState(BaseKill))  in MergeOps()
354                      | getKillRegState(Regs[i].second));  in MergeOps()
779     .addReg(Base, getKillRegState(BaseKill))  in MergeBaseUpdateLSMultiple()
932       .addReg(Base, getKillRegState(isLd ? BaseKill : false))  in MergeBaseUpdateLoadStore()
935                             getKillRegState(MO.isKill())));  in MergeBaseUpdateLoadStore()
966         .addReg(MO.getReg(), getKillRegState(MO.isKill()))  in MergeBaseUpdateLoadStore()
972         .addReg(MO.getReg(), getKillRegState(MO.isKill()))  in MergeBaseUpdateLoadStore()
1085       .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef));  in InsertLDR_STR()
1090       .addReg(Reg, getKillRegState(RegDeadKill) | getUndefRegState(RegUndef))  in InsertLDR_STR()
1091       .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef));  in InsertLDR_STR()
1140           .addReg(BaseReg, getKillRegState(BaseKill))  in FixInvalidRegPairOp()
1147           .addReg(BaseReg, getKillRegState(BaseKill))  in FixInvalidRegPairOp()
1150                   getKillRegState(EvenDeadKill) | getUndefRegState(EvenUndef))  in FixInvalidRegPairOp()
1152                   getKillRegState(OddDeadKill)  | getUndefRegState(OddUndef));  in FixInvalidRegPairOp()