Lines Matching refs:v4i32
62 def v4i32: LoadDFormVec<v4i32>;
94 def v4i32: LoadAFormVec<v4i32>;
126 def v4i32: LoadXFormVec<v4i32>;
174 def v4i32: StoreDFormVec<v4i32>;
204 def v4i32: StoreAFormVec<v4i32>;
236 def v4i32: StoreXFormVec<v4i32>;
283 [(set (v4i32 VECREG:$rT), (SPUshufmask dform2_addr:$src))]>;
287 [(set (v4i32 VECREG:$rT), (SPUshufmask xform_addr:$src))]>;
351 def v4i32: ILVecInst<v4i32, s16imm_i32, v4i32SExt16Imm>;
378 def v4i32: ILHUVecInst<v4i32, u16imm_i32, immILHUvec>;
410 def v4i32: ILAVecInst<v4i32, u18imm, v4i32Uns18Imm>;
448 def v4i32: IOHLVecInst<v4i32, u16imm_i32>;
471 def v4i32: FSMBIVec<v4i32>;
537 def v4i32: FSMVecInst<v4i32>;
539 def r32 : FSMRegInst<v4i32, R32C>;
540 def r16 : FSMRegInst<v4i32, R16C>;
581 // v4i32, i32 add instruction:
598 def v4i32: AVecInst<v4i32>;
628 def v4i32: AIVecInst<v4i32, v4i32SExt10Imm>;
662 [(set (v4i32 VECREG:$rT), (sub (v4i32 VECREG:$rB), (v4i32 VECREG:$rA)))]>;
672 [(set (v4i32 VECREG:$rT), (sub v4i32SExt10Imm:$val,
673 (v4i32 VECREG:$rA)))]>;
702 def v4i32 : ADDXVecInst<v4i32>;
727 def v4i32 : CGVecInst<v4i32>;
757 def v4i32 : SFXVecInst<v4i32>;
781 def v4i32 : BGVecInst<v4i32>;
870 [(set (v4i32 VECREG:$rT),
871 (add (v4i32 (bitconvert (mul (v8i16 VECREG:$rA),
873 (v4i32 VECREG:$rC)))]>;
994 def v4i32 : CLZVecInst<v4i32>;
1019 [(set (v4i32 VECREG:$rT), (SPUcntb (v4i32 VECREG:$rA)))]>;
1095 def v4i32_r32: GBRegInst<R32C, v4i32>;
1096 def v4i32_r16: GBRegInst<R16C, v4i32>;
1097 def v4i32: GBVecInst<v4i32>;
1172 def v4i32: XSHWVecInst<v8i16, v4i32>;
1199 def v2i64: XSWDVecInst<v4i32, v2i64>;
1227 def v4i32: ANDVecInst<v4i32>;
1263 (xor node:$in, (bitconvert (v4i32 immAllOnesV)))>;
1289 def v4i32: ANDCVecInst<v4i32>;
1347 def v4i32: ANDIInst<(outs VECREG:$rT), (ins VECREG:$rA, s10imm:$val),
1348 [(set (v4i32 VECREG:$rT),
1349 (and (v4i32 VECREG:$rA), v4i32SExt10Imm:$val))]>;
1395 def v4i32: ORVecInst<v4i32>;
1400 (v4f32 (bitconvert (or (v4i32 VECREG:$rA),
1401 (v4i32 VECREG:$rB)))))]>;
1433 def : Pat<(v4i32 (SPUprefslot2vec R32C:$rA)),
1451 def : Pat<(i32 (SPUvec2prefslot (v4i32 VECREG:$rA))),
1452 (COPY_TO_REGCLASS (v4i32 VECREG:$rA), R32C)>;
1490 def v4i32: LRVecInst<v4i32>;
1526 def v4i32: ORCVecInst<v4i32>;
1595 def v4i32: ORIVecInst<v4i32, v4i32Uns10Imm>;
1645 def v4i32: XORVecInst<v4i32>;
1701 [(set (v4i32 VECREG:$rT), (xor (v4i32 VECREG:$rA),
1727 def v4i32: NANDVecInst<v4i32>;
1757 def v4i32: NORVecInst<v4i32>;
1810 def v4i32: SELBVecInst<v4i32>;
1821 def v4i32_cond: SELBVecCondInst<v4i32>;
1826 def v4i32_vcond: SELBVecCondInst<v4i32>;
1832 (select (v4i32 VECREG:$rC),
1851 def : SPUselbPatVec<v4i32, SELBv4i32>;
1918 def v4i32: EQVVecInst<v4i32>;
1923 def v4i32_1: EQVVecPattern1<v4i32>;
1928 def v4i32_2: EQVVecPattern2<v4i32>;
1933 def v4i32_3: EQVVecPattern3<v4i32>;
1990 def v16i8_m32 : SHUFBVecInst<v16i8, v4i32>;
1992 def v8i16_m32 : SHUFBVecInst<v8i16, v4i32>;
1993 def v4i32 : SHUFBVecInst<v4i32, v16i8>;
1994 def v4i32_m32 : SHUFBVecInst<v4i32, v4i32>;
1996 def v2i64_m32 : SHUFBVecInst<v2i64, v4i32>;
1999 def v4f32_m32 : SHUFBVecInst<v4f32, v4i32>;
2002 def v2f64_m32 : SHUFBVecInst<v2f64, v4i32>;
2067 def v4i32:
2069 [(set (v4i32 VECREG:$rT),
2070 (SPUvec_shl (v4i32 VECREG:$rA), (v4i32 VECREG:$rB)))]>;
2086 def v4i32:
2088 [(set (v4i32 VECREG:$rT),
2089 (SPUvec_shl (v4i32 VECREG:$rA), (i32 uimm7:$val)))]>;
2126 def v4i32: SHLQBIVecInst<v4i32>;
2151 def v4i32 : SHLQBIIVecInst<v4i32>;
2175 def v4i32: SHLQBYVecInst<v4i32>;
2198 def v4i32: SHLQBYIVecInst<v4i32>;
2225 def v4i32: SHLQBYBIVecInst<v4i32>;
2308 def v4i32: ROTVecInst<v4i32>;
2355 def v4i32: ROTIVecInst<v4i32, u7imm_i32, i32, uimm7>;
2356 def v4i32_i16: ROTIVecInst<v4i32, u7imm, i16, uimm7>;
2357 def v4i32_i8: ROTIVecInst<v4i32, u7imm_i8, i8, uimm7>;
2386 def v4i32: ROTQBYVecInst<v4i32>;
2415 def v4i32: ROTQBYIVecInst<v4i32>;
2438 def v4i32_r32: ROTQBYBIVecInst<v4i32, R32C>;
2467 def v4i32: ROTQBIVecInst<v4i32>;
2494 def v4i32: ROTQBIIVecInst<v4i32, u7imm_i32, i32, uimm7>;
2575 // ROTM v4i32 form: See the ROTHM v8i16 comments.
2584 def : Pat<(SPUvec_srl (v4i32 VECREG:$rA), (v4i32 VECREG:$rB)),
2602 // ROTMI v4i32 form: See the comment for ROTHM v8i16.
2606 [(set (v4i32 VECREG:$rT),
2609 def : Pat<(SPUvec_srl (v4i32 VECREG:$rA), (i16 uimm7:$val)),
2612 def : Pat<(SPUvec_srl (v4i32 VECREG:$rA), (i8 uimm7:$val)),
2649 def v4i32: ROTQMBYVecInst<v4i32>;
2684 def v4i32: ROTQMBYIVecInst<v4i32>;
2714 def v4i32: ROTQMBYBIVecInst<v4i32>;
2743 def v4i32: ROTQMBIVecInst<v4i32>;
2778 def v4i32: ROTQMBIIVecInst<v4i32>;
2842 def : Pat<(SPUvec_sra (v4i32 VECREG:$rA), (v4i32 VECREG:$rB)),
2843 (ROTMAv4i32 VECREG:$rA, (SFIvec (v4i32 VECREG:$rB), 0))>;
2877 def v4i32_i32 : ROTMAIVecInst<v4i32, rotNeg7imm, i32>;
2992 def v4i32 : CEQInst<(outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB),
2993 [(set (v4i32 VECREG:$rT),
2994 (seteq (v4i32 VECREG:$rA), (v4i32 VECREG:$rB)))]>;
3006 def v4i32 : CEQIInst<(outs VECREG:$rT), (ins VECREG:$rA, s10imm:$val),
3007 [(set (v4i32 VECREG:$rT),
3008 (seteq (v4i32 VECREG:$rA),
3009 (v4i32 v4i32SExt16Imm:$val)))]>;
3080 def v4i32 : CGTInst<(outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB),
3081 [(set (v4i32 VECREG:$rT),
3082 (setgt (v4i32 VECREG:$rA), (v4i32 VECREG:$rB)))]>;
3094 def v4i32 : CGTIInst<(outs VECREG:$rT), (ins VECREG:$rA, s10imm:$val),
3095 [(set (v4i32 VECREG:$rT),
3096 (setgt (v4i32 VECREG:$rA),
3097 (v4i32 v4i32SExt16Imm:$val)))]>;
3104 [(set (v4i32 VECREG:$rT),
3105 (setgt (v4i32 (bitconvert (v4f32 VECREG:$rA))),
3106 (v4i32 v4i32SExt16Imm:$val)))]>;
3177 def v4i32 : CLGTInst<(outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB),
3178 [(set (v4i32 VECREG:$rT),
3179 (setugt (v4i32 VECREG:$rA), (v4i32 VECREG:$rB)))]>;
3191 def v4i32 : CLGTIInst<(outs VECREG:$rT), (ins VECREG:$rA, s10imm:$val),
3192 [(set (v4i32 VECREG:$rT),
3193 (setugt (v4i32 VECREG:$rA),
3194 (v4i32 v4i32SExt16Imm:$val)))]>;
3490 def v4i32 : BRNZVecInst<v4i32>;
3507 def v4i32: BRZVecInst<v4i32>;
3528 def v4i32: BINZVecInst<v4i32>;
3544 def v4i32: BIZVecInst<v4i32>;
3959 [(set (v4f32 VECREG:$rT), (sint_to_fp (v4i32 VECREG:$rA)))]>;
3971 [(set (v4f32 VECREG:$rT), (uint_to_fp (v4i32 VECREG:$rA)))]>;
3984 [(set (v4i32 VECREG:$rT), (fp_to_uint (v4f32 VECREG:$rA)))]>;
3997 [(set (v4i32 VECREG:$rT), (fp_to_sint (v4f32 VECREG:$rA)))]>;
4214 def : Pat<(v16i8 (bitconvert (v4i32 VECREG:$src))), (v16i8 VECREG:$src)>;
4220 def : Pat<(v8i16 (bitconvert (v4i32 VECREG:$src))), (v8i16 VECREG:$src)>;
4225 def : Pat<(v4i32 (bitconvert (v16i8 VECREG:$src))), (v4i32 VECREG:$src)>;
4226 def : Pat<(v4i32 (bitconvert (v8i16 VECREG:$src))), (v4i32 VECREG:$src)>;
4227 def : Pat<(v4i32 (bitconvert (v2i64 VECREG:$src))), (v4i32 VECREG:$src)>;
4228 def : Pat<(v4i32 (bitconvert (v4f32 VECREG:$src))), (v4i32 VECREG:$src)>;
4229 def : Pat<(v4i32 (bitconvert (v2f64 VECREG:$src))), (v4i32 VECREG:$src)>;
4233 def : Pat<(v2i64 (bitconvert (v4i32 VECREG:$src))), (v2i64 VECREG:$src)>;
4240 def : Pat<(v4f32 (bitconvert (v4i32 VECREG:$src))), (v4f32 VECREG:$src)>;
4245 def : Pat<(v2f64 (bitconvert (v4i32 VECREG:$src))), (v2f64 VECREG:$src)>;
4253 def : Pat<(i128 (bitconvert (v4i32 VECREG:$src))),
4266 def : Pat<(v4i32 (bitconvert (i128 GPRC:$src))),
4267 (v4i32 (COPY_TO_REGCLASS GPRC:$src, VECREG))>;
4301 def : Pat<(v4i32 v4i32Imm:$imm),
4302 (IOHLv4i32 (v4i32 (ILHUv4i32 (HI16_vec v4i32Imm:$imm))),