Lines Matching refs:OpNode
163 class Arith<bits<6> op, bits<11> flags, string instr_asm, SDNode OpNode,
167 [(set GPR:$dst, (OpNode GPR:$b, GPR:$c))], itin>;
169 class ArithI<bits<6> op, string instr_asm, SDNode OpNode,
173 [(set GPR:$dst, (OpNode GPR:$b, imm_type:$c))], IIC_ALU>;
180 class ShiftI<bits<6> op, bits<2> flags, string instr_asm, SDNode OpNode,
184 [(set GPR:$dst, (OpNode GPR:$b, imm_type:$c))], IIC_SHT>;
186 class ArithR<bits<6> op, bits<11> flags, string instr_asm, SDNode OpNode,
190 [(set GPR:$dst, (OpNode GPR:$b, GPR:$c))], itin>;
192 class ArithRI<bits<6> op, string instr_asm, SDNode OpNode,
196 [(set GPR:$dst, (OpNode imm_type:$b, GPR:$c))], IIC_ALU>;
224 class Logic<bits<6> op, bits<11> flags, string instr_asm, SDNode OpNode> :
227 [(set GPR:$dst, (OpNode GPR:$b, GPR:$c))], IIC_ALU>;
229 class LogicI<bits<6> op, string instr_asm, SDNode OpNode> :
232 [(set GPR:$dst, (OpNode GPR:$b, immZExt16:$c))],
256 class LoadMI<bits<6> op, string instr_asm, PatFrag OpNode> :
259 [(set (i32 GPR:$dst), (OpNode iaddr:$addr))], IIC_MEMl>;
268 class StoreMI<bits<6> op, string instr_asm, PatFrag OpNode> :
271 [(OpNode (i32 GPR:$dst), iaddr:$addr)], IIC_MEMs>;