87                                          unsigned &SrcReg, unsigned &DstReg,  in isCoalescableExtInstr()  argument
93     SrcReg = MI.getOperand(1).getReg();  in isCoalescableExtInstr()
415                                unsigned DestReg, unsigned SrcReg,  in copyPhysReg()  argument
418   if (PPC::GPRCRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
420   else if (PPC::G8RCRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
422   else if (PPC::F4RCRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
424   else if (PPC::CRRCRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
426   else if (PPC::VRRCRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
428   else if (PPC::CRBITRCRegClass.contains(DestReg, SrcReg))  in copyPhysReg()
436       .addReg(SrcReg).addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
438     BuildMI(MBB, I, DL, MCID, DestReg).addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
444                                   unsigned SrcReg, bool isKill,  in StoreRegToStackSlot()  argument
450     if (SrcReg != PPC::LR) {  in StoreRegToStackSlot()
452                                          .addReg(SrcReg,  in StoreRegToStackSlot()
466     if (SrcReg != PPC::LR8) {  in StoreRegToStackSlot()
468                                          .addReg(SrcReg,  in StoreRegToStackSlot()
483                                        .addReg(SrcReg,  in StoreRegToStackSlot()
488                                        .addReg(SrcReg,  in StoreRegToStackSlot()
495                                          .addReg(SrcReg,  in StoreRegToStackSlot()
514                                .addReg(SrcReg, getKillRegState(isKill)));  in StoreRegToStackSlot()
518       if (SrcReg != PPC::CR0) {  in StoreRegToStackSlot()
519         unsigned ShiftBits = getPPCRegisterNumbering(SrcReg)*4;  in StoreRegToStackSlot()
539     if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR0GT ||  in StoreRegToStackSlot()
540         SrcReg == PPC::CR0EQ || SrcReg == PPC::CR0UN)  in StoreRegToStackSlot()
542     else if (SrcReg == PPC::CR1LT || SrcReg == PPC::CR1GT ||  in StoreRegToStackSlot()
543              SrcReg == PPC::CR1EQ || SrcReg == PPC::CR1UN)  in StoreRegToStackSlot()
545     else if (SrcReg == PPC::CR2LT || SrcReg == PPC::CR2GT ||  in StoreRegToStackSlot()
546              SrcReg == PPC::CR2EQ || SrcReg == PPC::CR2UN)  in StoreRegToStackSlot()
548     else if (SrcReg == PPC::CR3LT || SrcReg == PPC::CR3GT ||  in StoreRegToStackSlot()
549              SrcReg == PPC::CR3EQ || SrcReg == PPC::CR3UN)  in StoreRegToStackSlot()
551     else if (SrcReg == PPC::CR4LT || SrcReg == PPC::CR4GT ||  in StoreRegToStackSlot()
552              SrcReg == PPC::CR4EQ || SrcReg == PPC::CR4UN)  in StoreRegToStackSlot()
554     else if (SrcReg == PPC::CR5LT || SrcReg == PPC::CR5GT ||  in StoreRegToStackSlot()
555              SrcReg == PPC::CR5EQ || SrcReg == PPC::CR5UN)  in StoreRegToStackSlot()
557     else if (SrcReg == PPC::CR6LT || SrcReg == PPC::CR6GT ||  in StoreRegToStackSlot()
558              SrcReg == PPC::CR6EQ || SrcReg == PPC::CR6UN)  in StoreRegToStackSlot()
560     else if (SrcReg == PPC::CR7LT || SrcReg == PPC::CR7GT ||  in StoreRegToStackSlot()
561              SrcReg == PPC::CR7EQ || SrcReg == PPC::CR7UN)  in StoreRegToStackSlot()
576                      .addReg(SrcReg, getKillRegState(isKill))  in StoreRegToStackSlot()
589                                   unsigned SrcReg, bool isKill, int FrameIdx,  in storeRegToStackSlot()  argument
595   if (StoreRegToStackSlot(MF, SrcReg, isKill, FrameIdx, RC, NewMIs)) {  in storeRegToStackSlot()