55     return X86_MC::getX86RegNum(MO.getReg());  in GetX86RegNum()
69     unsigned SrcReg = MI.getOperand(OpNum).getReg();  in getVEXRegisterEncoding()
169   if ((BaseReg.getReg() != 0 &&  in Is32BitMemOperand()
170        X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg.getReg())) ||  in Is32BitMemOperand()
171       (IndexReg.getReg() != 0 &&  in Is32BitMemOperand()
172        X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg.getReg())))  in Is32BitMemOperand()
184   if ((BaseReg.getReg() != 0 &&  in Is64BitMemOperand()
185        X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg.getReg())) ||  in Is64BitMemOperand()
186       (IndexReg.getReg() != 0 &&  in Is64BitMemOperand()
187        X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg.getReg())))  in Is64BitMemOperand()
199   if ((BaseReg.getReg() != 0 &&  in Is16BitMemOperand()
200        X86MCRegisterClasses[X86::GR16RegClassID].contains(BaseReg.getReg())) ||  in Is16BitMemOperand()
201       (IndexReg.getReg() != 0 &&  in Is16BitMemOperand()
202        X86MCRegisterClasses[X86::GR16RegClassID].contains(IndexReg.getReg())))  in Is16BitMemOperand()
306   unsigned BaseReg = Base.getReg();  in EmitMemModRMByte()
311     assert(IndexReg.getReg() == 0 && "Invalid rip-relative address");  in EmitMemModRMByte()
342       IndexReg.getReg() == 0 &&  in EmitMemModRMByte()
381   assert(IndexReg.getReg() != X86::ESP &&  in EmitMemModRMByte()
382          IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!");  in EmitMemModRMByte()
418     if (IndexReg.getReg())  in EmitMemModRMByte()
425     if (IndexReg.getReg())  in EmitMemModRMByte()
567     unsigned SrcReg = MI.getOperand(i).getReg();  in EmitVEXOpcodePrefix()
592     if (X86II::isX86_64ExtendedReg(MI.getOperand(X86::AddrBaseReg).getReg()))  in EmitVEXOpcodePrefix()
594     if (X86II::isX86_64ExtendedReg(MI.getOperand(X86::AddrIndexReg).getReg()))  in EmitVEXOpcodePrefix()
602     if (MO.isReg() && X86II::isX86_64ExtendedReg(MO.getReg()))  in EmitVEXOpcodePrefix()
616     if (X86II::isX86_64ExtendedReg(MI.getOperand(CurOp++).getReg()))  in EmitVEXOpcodePrefix()
623                MI.getOperand(MemOperand+X86::AddrBaseReg).getReg()))  in EmitVEXOpcodePrefix()
626                MI.getOperand(MemOperand+X86::AddrIndexReg).getReg()))  in EmitVEXOpcodePrefix()
648                MI.getOperand(MemOperand+X86::AddrBaseReg).getReg()))  in EmitVEXOpcodePrefix()
651                MI.getOperand(MemOperand+X86::AddrIndexReg).getReg()))  in EmitVEXOpcodePrefix()
661     if (X86II::isX86_64ExtendedReg(MI.getOperand(CurOp).getReg()))  in EmitVEXOpcodePrefix()
667     if (X86II::isX86_64ExtendedReg(MI.getOperand(CurOp).getReg()))  in EmitVEXOpcodePrefix()
677     if (X86II::isX86_64ExtendedReg(MI.getOperand(0).getReg()))  in EmitVEXOpcodePrefix()
679     if (X86II::isX86_64ExtendedReg(MI.getOperand(1).getReg()))  in EmitVEXOpcodePrefix()
689     if (X86II::isX86_64ExtendedReg(MI.getOperand(1).getReg()))  in EmitVEXOpcodePrefix()
745     unsigned Reg = MO.getReg();  in DetermineREXPrefix()
757         X86II::isX86_64ExtendedReg(MI.getOperand(0).getReg()))  in DetermineREXPrefix()
762       if (MO.isReg() && X86II::isX86_64ExtendedReg(MO.getReg()))  in DetermineREXPrefix()
768         X86II::isX86_64ExtendedReg(MI.getOperand(0).getReg()))  in DetermineREXPrefix()
775         if (X86II::isX86_64ExtendedReg(MO.getReg()))  in DetermineREXPrefix()
790         X86II::isX86_64ExtendedReg(MI.getOperand(e).getReg()))  in DetermineREXPrefix()
796         if (X86II::isX86_64ExtendedReg(MO.getReg()))  in DetermineREXPrefix()
805         X86II::isX86_64ExtendedReg(MI.getOperand(0).getReg()))  in DetermineREXPrefix()
810       if (MO.isReg() && X86II::isX86_64ExtendedReg(MO.getReg()))  in DetermineREXPrefix()
828       switch (MI.getOperand(MemOperand+X86::AddrSegmentReg).getReg()) {  in EmitSegmentOverridePrefix()
1181       if (X86II::isX86_64ExtendedReg(MO.getReg()))  in EncodeInstruction()