Lines Matching refs:tmp1

6 	%tmp1 = load <2 x float>* %A
7 	%tmp2 = fptosi <2 x float> %tmp1 to <2 x i32>
14 	%tmp1 = load <2 x float>* %A
15 	%tmp2 = fptoui <2 x float> %tmp1 to <2 x i32>
22 	%tmp1 = load <2 x i32>* %A
23 	%tmp2 = sitofp <2 x i32> %tmp1 to <2 x float>
30 	%tmp1 = load <2 x i32>* %A
31 	%tmp2 = uitofp <2 x i32> %tmp1 to <2 x float>
38 	%tmp1 = load <4 x float>* %A
39 	%tmp2 = fptosi <4 x float> %tmp1 to <4 x i32>
46 	%tmp1 = load <4 x float>* %A
47 	%tmp2 = fptoui <4 x float> %tmp1 to <4 x i32>
54 	%tmp1 = load <4 x i32>* %A
55 	%tmp2 = sitofp <4 x i32> %tmp1 to <4 x float>
62 	%tmp1 = load <4 x i32>* %A
63 	%tmp2 = uitofp <4 x i32> %tmp1 to <4 x float>
70 	%tmp1 = load <2 x float>* %A
71 	%tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float> %tmp1, i32 1)
78 	%tmp1 = load <2 x float>* %A
79 	%tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float> %tmp1, i32 1)
86 	%tmp1 = load <2 x i32>* %A
87 	%tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1)
94 	%tmp1 = load <2 x i32>* %A
95 	%tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1)
107 	%tmp1 = load <4 x float>* %A
108 	%tmp2 = call <4 x i32> @llvm.arm.neon.vcvtfp2fxs.v4i32.v4f32(<4 x float> %tmp1, i32 1)
115 	%tmp1 = load <4 x float>* %A
116 	%tmp2 = call <4 x i32> @llvm.arm.neon.vcvtfp2fxu.v4i32.v4f32(<4 x float> %tmp1, i32 1)
123 	%tmp1 = load <4 x i32>* %A
124 	%tmp2 = call <4 x float> @llvm.arm.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32> %tmp1, i32 1)
131 	%tmp1 = load <4 x i32>* %A
132 	%tmp2 = call <4 x float> @llvm.arm.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32> %tmp1, i32 1)
144 	%tmp1 = load <4 x i16>* %A
145 	%tmp2 = call <4 x float> @llvm.arm.neon.vcvthf2fp(<4 x i16> %tmp1)
152 	%tmp1 = load <4 x float>* %A
153 	%tmp2 = call <4 x i16> @llvm.arm.neon.vcvtfp2hf(<4 x float> %tmp1)