39                         target_ulong address, int rw, int access_type)  in no_mmu_map_address()  argument
48                            target_ulong address, int rw, int access_type)  in fixed_mmu_map_address()  argument
66                      target_ulong address, int rw, int access_type)  in r4k_map_address()  argument
94             if (rw == 0 || (n ? tlb->D1 : tlb->D0)) {  in r4k_map_address()
110                                 int rw, int access_type)  in get_physical_address()  argument
133             ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);  in get_physical_address()
139             ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);  in get_physical_address()
147             ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);  in get_physical_address()
164             ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);  in get_physical_address()
188             ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);  in get_physical_address()
196             ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);  in get_physical_address()
203             address, rw, access_type, *physical, *prot, ret);  in get_physical_address()
211                                 int rw, int tlb_error)  in raise_mmu_exception()  argument
220         if (rw)  in raise_mmu_exception()
227         if (rw)  in raise_mmu_exception()
235         if (rw)  in raise_mmu_exception()
303 static inline int cpu_mips_tlb_refill(CPUState *env, target_ulong address, int rw ,  in cpu_mips_tlb_refill()  argument
375     if (rw == 0 || (n ? (elo_odd & 4) != 0 : (elo_even & 4) != 0)) {  in cpu_mips_tlb_refill()
398 int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,  in cpu_mips_handle_mmu_fault()  argument
413               __func__, env->active_tc.PC, address, rw, mmu_idx, is_softmmu);  in cpu_mips_handle_mmu_fault()
415     rw &= 1;  in cpu_mips_handle_mmu_fault()
425                                address, rw, access_type);  in cpu_mips_handle_mmu_fault()
434         ret = cpu_mips_tlb_refill(env,address,rw,mmu_idx,is_softmmu);  in cpu_mips_handle_mmu_fault()
438         raise_mmu_exception(env, address, rw, ret);  in cpu_mips_handle_mmu_fault()
446 target_phys_addr_t cpu_mips_translate_address(CPUState *env, target_ulong address, int rw)  in cpu_mips_translate_address()  argument
453     rw &= 1;  in cpu_mips_translate_address()
458                                address, rw, access_type);  in cpu_mips_translate_address()
460         raise_mmu_exception(env, address, rw, ret);  in cpu_mips_translate_address()