Lines Matching refs:src4

336             Register src4,
341     ASSERT(!src1.is(src4));
342     ASSERT(!src2.is(src4));
343     ASSERT(!src3.is(src4));
346         if (src3.code() > src4.code()) {
349               src1.bit() | src2.bit() | src3.bit() | src4.bit(),
353           str(src4, MemOperand(sp, 4, NegPreIndex), cond);
357         Push(src3, src4, cond);
361       Push(src2, src3, src4, cond);
398            Register src4,
403     ASSERT(!src1.is(src4));
404     ASSERT(!src2.is(src4));
405     ASSERT(!src3.is(src4));
408         if (src3.code() > src4.code()) {
411               src1.bit() | src2.bit() | src3.bit() | src4.bit(),
414           ldr(src4, MemOperand(sp, 4, PostIndex), cond);
418         Pop(src3, src4, cond);
422       Pop(src2, src3, src4, cond);