Lines Matching refs:XX
3586 # define XX(_n) *p++ = (_n) in emit_AMD64Instr() macro
3593 case Asse_MOV: /*movups*/ XX(rex); XX(0x0F); XX(0x10); break; in emit_AMD64Instr()
3594 case Asse_OR: XX(rex); XX(0x0F); XX(0x56); break; in emit_AMD64Instr()
3595 case Asse_XOR: XX(rex); XX(0x0F); XX(0x57); break; in emit_AMD64Instr()
3596 case Asse_AND: XX(rex); XX(0x0F); XX(0x54); break; in emit_AMD64Instr()
3597 case Asse_ANDN: XX(rex); XX(0x0F); XX(0x55); break; in emit_AMD64Instr()
3598 case Asse_PACKSSD: XX(0x66); XX(rex); XX(0x0F); XX(0x6B); break; in emit_AMD64Instr()
3599 case Asse_PACKSSW: XX(0x66); XX(rex); XX(0x0F); XX(0x63); break; in emit_AMD64Instr()
3600 case Asse_PACKUSW: XX(0x66); XX(rex); XX(0x0F); XX(0x67); break; in emit_AMD64Instr()
3601 case Asse_ADD8: XX(0x66); XX(rex); XX(0x0F); XX(0xFC); break; in emit_AMD64Instr()
3602 case Asse_ADD16: XX(0x66); XX(rex); XX(0x0F); XX(0xFD); break; in emit_AMD64Instr()
3603 case Asse_ADD32: XX(0x66); XX(rex); XX(0x0F); XX(0xFE); break; in emit_AMD64Instr()
3604 case Asse_ADD64: XX(0x66); XX(rex); XX(0x0F); XX(0xD4); break; in emit_AMD64Instr()
3605 case Asse_QADD8S: XX(0x66); XX(rex); XX(0x0F); XX(0xEC); break; in emit_AMD64Instr()
3606 case Asse_QADD16S: XX(0x66); XX(rex); XX(0x0F); XX(0xED); break; in emit_AMD64Instr()
3607 case Asse_QADD8U: XX(0x66); XX(rex); XX(0x0F); XX(0xDC); break; in emit_AMD64Instr()
3608 case Asse_QADD16U: XX(0x66); XX(rex); XX(0x0F); XX(0xDD); break; in emit_AMD64Instr()
3609 case Asse_AVG8U: XX(0x66); XX(rex); XX(0x0F); XX(0xE0); break; in emit_AMD64Instr()
3610 case Asse_AVG16U: XX(0x66); XX(rex); XX(0x0F); XX(0xE3); break; in emit_AMD64Instr()
3611 case Asse_CMPEQ8: XX(0x66); XX(rex); XX(0x0F); XX(0x74); break; in emit_AMD64Instr()
3612 case Asse_CMPEQ16: XX(0x66); XX(rex); XX(0x0F); XX(0x75); break; in emit_AMD64Instr()
3613 case Asse_CMPEQ32: XX(0x66); XX(rex); XX(0x0F); XX(0x76); break; in emit_AMD64Instr()
3614 case Asse_CMPGT8S: XX(0x66); XX(rex); XX(0x0F); XX(0x64); break; in emit_AMD64Instr()
3615 case Asse_CMPGT16S: XX(0x66); XX(rex); XX(0x0F); XX(0x65); break; in emit_AMD64Instr()
3616 case Asse_CMPGT32S: XX(0x66); XX(rex); XX(0x0F); XX(0x66); break; in emit_AMD64Instr()
3617 case Asse_MAX16S: XX(0x66); XX(rex); XX(0x0F); XX(0xEE); break; in emit_AMD64Instr()
3618 case Asse_MAX8U: XX(0x66); XX(rex); XX(0x0F); XX(0xDE); break; in emit_AMD64Instr()
3619 case Asse_MIN16S: XX(0x66); XX(rex); XX(0x0F); XX(0xEA); break; in emit_AMD64Instr()
3620 case Asse_MIN8U: XX(0x66); XX(rex); XX(0x0F); XX(0xDA); break; in emit_AMD64Instr()
3621 case Asse_MULHI16U: XX(0x66); XX(rex); XX(0x0F); XX(0xE4); break; in emit_AMD64Instr()
3622 case Asse_MULHI16S: XX(0x66); XX(rex); XX(0x0F); XX(0xE5); break; in emit_AMD64Instr()
3623 case Asse_MUL16: XX(0x66); XX(rex); XX(0x0F); XX(0xD5); break; in emit_AMD64Instr()
3624 case Asse_SHL16: XX(0x66); XX(rex); XX(0x0F); XX(0xF1); break; in emit_AMD64Instr()
3625 case Asse_SHL32: XX(0x66); XX(rex); XX(0x0F); XX(0xF2); break; in emit_AMD64Instr()
3626 case Asse_SHL64: XX(0x66); XX(rex); XX(0x0F); XX(0xF3); break; in emit_AMD64Instr()
3627 case Asse_SAR16: XX(0x66); XX(rex); XX(0x0F); XX(0xE1); break; in emit_AMD64Instr()
3628 case Asse_SAR32: XX(0x66); XX(rex); XX(0x0F); XX(0xE2); break; in emit_AMD64Instr()
3629 case Asse_SHR16: XX(0x66); XX(rex); XX(0x0F); XX(0xD1); break; in emit_AMD64Instr()
3630 case Asse_SHR32: XX(0x66); XX(rex); XX(0x0F); XX(0xD2); break; in emit_AMD64Instr()
3631 case Asse_SHR64: XX(0x66); XX(rex); XX(0x0F); XX(0xD3); break; in emit_AMD64Instr()
3632 case Asse_SUB8: XX(0x66); XX(rex); XX(0x0F); XX(0xF8); break; in emit_AMD64Instr()
3633 case Asse_SUB16: XX(0x66); XX(rex); XX(0x0F); XX(0xF9); break; in emit_AMD64Instr()
3634 case Asse_SUB32: XX(0x66); XX(rex); XX(0x0F); XX(0xFA); break; in emit_AMD64Instr()
3635 case Asse_SUB64: XX(0x66); XX(rex); XX(0x0F); XX(0xFB); break; in emit_AMD64Instr()
3636 case Asse_QSUB8S: XX(0x66); XX(rex); XX(0x0F); XX(0xE8); break; in emit_AMD64Instr()
3637 case Asse_QSUB16S: XX(0x66); XX(rex); XX(0x0F); XX(0xE9); break; in emit_AMD64Instr()
3638 case Asse_QSUB8U: XX(0x66); XX(rex); XX(0x0F); XX(0xD8); break; in emit_AMD64Instr()
3639 case Asse_QSUB16U: XX(0x66); XX(rex); XX(0x0F); XX(0xD9); break; in emit_AMD64Instr()
3640 case Asse_UNPCKHB: XX(0x66); XX(rex); XX(0x0F); XX(0x68); break; in emit_AMD64Instr()
3641 case Asse_UNPCKHW: XX(0x66); XX(rex); XX(0x0F); XX(0x69); break; in emit_AMD64Instr()
3642 case Asse_UNPCKHD: XX(0x66); XX(rex); XX(0x0F); XX(0x6A); break; in emit_AMD64Instr()
3643 case Asse_UNPCKHQ: XX(0x66); XX(rex); XX(0x0F); XX(0x6D); break; in emit_AMD64Instr()
3644 case Asse_UNPCKLB: XX(0x66); XX(rex); XX(0x0F); XX(0x60); break; in emit_AMD64Instr()
3645 case Asse_UNPCKLW: XX(0x66); XX(rex); XX(0x0F); XX(0x61); break; in emit_AMD64Instr()
3646 case Asse_UNPCKLD: XX(0x66); XX(rex); XX(0x0F); XX(0x62); break; in emit_AMD64Instr()
3647 case Asse_UNPCKLQ: XX(0x66); XX(rex); XX(0x0F); XX(0x6C); break; in emit_AMD64Instr()
3652 # undef XX in emit_AMD64Instr()