Lines Matching refs:Rm
229 int Rd, int Rm, int Rs, int Rn) { in MLA() argument
230 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MLA()
231 LOG_FATAL_IF(Rd==Rm, "MLA(r%u,r%u,r%u,r%u)", Rd,Rm,Rs,Rn); in MLA()
233 (Rd<<16) | (Rn<<12) | (Rs<<8) | 0x90 | Rm; in MLA()
236 int Rd, int Rm, int Rs) { in MUL() argument
237 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MUL()
238 LOG_FATAL_IF(Rd==Rm, "MUL(r%u,r%u,r%u)", Rd,Rm,Rs); in MUL()
239 *mPC++ = (cc<<28) | (s<<20) | (Rd<<16) | (Rs<<8) | 0x90 | Rm; in MUL()
242 int RdLo, int RdHi, int Rm, int Rs) { in UMULL() argument
243 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in UMULL()
244 "UMULL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs); in UMULL()
246 (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm; in UMULL()
249 int RdLo, int RdHi, int Rm, int Rs) { in UMUAL() argument
250 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in UMUAL()
251 "UMUAL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs); in UMUAL()
253 (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm; in UMUAL()
256 int RdLo, int RdHi, int Rm, int Rs) { in SMULL() argument
257 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in SMULL()
258 "SMULL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs); in SMULL()
260 (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm; in SMULL()
263 int RdLo, int RdHi, int Rm, int Rs) { in SMUAL() argument
264 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in SMUAL()
265 "SMUAL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs); in SMUAL()
267 (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm; in SMUAL()
355 void ARMAssembler::SWP(int cc, int Rn, int Rd, int Rm) { in SWP() argument
356 *mPC++ = (cc<<28) | (2<<23) | (Rn<<16) | (Rd << 12) | 0x90 | Rm; in SWP()
358 void ARMAssembler::SWPB(int cc, int Rn, int Rd, int Rm) { in SWPB() argument
359 *mPC++ = (cc<<28) | (2<<23) | (1<<22) | (Rn<<16) | (Rd << 12) | 0x90 | Rm; in SWPB()
377 void ARMAssembler::CLZ(int cc, int Rd, int Rm) in CLZ() argument
379 *mPC++ = (cc<<28) | 0x16F0F10| (Rd<<12) | Rm; in CLZ()
382 void ARMAssembler::QADD(int cc, int Rd, int Rm, int Rn) in QADD() argument
384 *mPC++ = (cc<<28) | 0x1000050 | (Rn<<16) | (Rd<<12) | Rm; in QADD()
387 void ARMAssembler::QDADD(int cc, int Rd, int Rm, int Rn) in QDADD() argument
389 *mPC++ = (cc<<28) | 0x1400050 | (Rn<<16) | (Rd<<12) | Rm; in QDADD()
392 void ARMAssembler::QSUB(int cc, int Rd, int Rm, int Rn) in QSUB() argument
394 *mPC++ = (cc<<28) | 0x1200050 | (Rn<<16) | (Rd<<12) | Rm; in QSUB()
397 void ARMAssembler::QDSUB(int cc, int Rd, int Rm, int Rn) in QDSUB() argument
399 *mPC++ = (cc<<28) | 0x1600050 | (Rn<<16) | (Rd<<12) | Rm; in QDSUB()
403 int Rd, int Rm, int Rs) in SMUL() argument
405 *mPC++ = (cc<<28) | 0x1600080 | (Rd<<16) | (Rs<<8) | (xy<<4) | Rm; in SMUL()
409 int Rd, int Rm, int Rs) in SMULW() argument
411 *mPC++ = (cc<<28) | 0x12000A0 | (Rd<<16) | (Rs<<8) | (y<<4) | Rm; in SMULW()
415 int Rd, int Rm, int Rs, int Rn) in SMLA() argument
417 *mPC++ = (cc<<28) | 0x1000080 | (Rd<<16) | (Rn<<12) | (Rs<<8) | (xy<<4) | Rm; in SMLA()
421 int RdHi, int RdLo, int Rs, int Rm) in SMLAL() argument
423 *mPC++ = (cc<<28) | 0x1400080 | (RdHi<<16) | (RdLo<<12) | (Rs<<8) | (xy<<4) | Rm; in SMLAL()
427 int Rd, int Rm, int Rs, int Rn) in SMLAW() argument
429 *mPC++ = (cc<<28) | 0x1200080 | (Rd<<16) | (Rn<<12) | (Rs<<8) | (y<<4) | Rm; in SMLAW()
437 void ARMAssembler::UXTB16(int cc, int Rd, int Rm, int rotate) in UXTB16() argument
439 *mPC++ = (cc<<28) | 0x6CF0070 | (Rd<<12) | ((rotate >> 3) << 10) | Rm; in UXTB16()
510 uint32_t ARMAssembler::reg_imm(int Rm, int type, uint32_t shift) in reg_imm() argument
512 return ((shift&0x1F)<<7) | ((type&0x3)<<5) | (Rm&0xF); in reg_imm()
515 uint32_t ARMAssembler::reg_rrx(int Rm) in reg_rrx() argument
517 return (ROR<<5) | (Rm&0xF); in reg_rrx()
520 uint32_t ARMAssembler::reg_reg(int Rm, int type, int Rs) in reg_reg() argument
522 return ((Rs&0xF)<<8) | ((type&0x3)<<5) | (1<<4) | (Rm&0xF); in reg_reg()
545 uint32_t ARMAssembler::reg_scale_pre(int Rm, int type, in reg_scale_pre() argument
549 (((uint32_t(Rm)>>31)^1)<<23) | ((W&1)<<21) | in reg_scale_pre()
550 reg_imm(abs(Rm), type, shift); in reg_scale_pre()
553 uint32_t ARMAssembler::reg_scale_post(int Rm, int type, uint32_t shift) in reg_scale_post() argument
555 return (1<<25) | (((uint32_t(Rm)>>31)^1)<<23) | reg_imm(abs(Rm), type, shift); in reg_scale_post()
583 uint32_t ARMAssembler::reg_pre(int Rm, int W) in reg_pre() argument
585 return (1<<24) | (((uint32_t(Rm)>>31)^1)<<23) | ((W&1)<<21) | (abs(Rm)&0xF); in reg_pre()
588 uint32_t ARMAssembler::reg_post(int Rm) in reg_post() argument
590 return (((uint32_t(Rm)>>31)^1)<<23) | (abs(Rm)&0xF); in reg_post()