1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
14 //
15 //===----------------------------------------------------------------------===//
16
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "CodeGenSchedule.h"
20 #include "llvm/TableGen/Record.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/ADT/STLExtras.h"
23 #include "llvm/Support/CommandLine.h"
24 #include <algorithm>
25 using namespace llvm;
26
27 static cl::opt<unsigned>
28 AsmParserNum("asmparsernum", cl::init(0),
29 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
30
31 static cl::opt<unsigned>
32 AsmWriterNum("asmwriternum", cl::init(0),
33 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
34
35 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
36 /// record corresponds to.
getValueType(Record * Rec)37 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
38 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
39 }
40
getName(MVT::SimpleValueType T)41 std::string llvm::getName(MVT::SimpleValueType T) {
42 switch (T) {
43 case MVT::Other: return "UNKNOWN";
44 case MVT::iPTR: return "TLI.getPointerTy()";
45 case MVT::iPTRAny: return "TLI.getPointerTy()";
46 default: return getEnumName(T);
47 }
48 }
49
getEnumName(MVT::SimpleValueType T)50 std::string llvm::getEnumName(MVT::SimpleValueType T) {
51 switch (T) {
52 case MVT::Other: return "MVT::Other";
53 case MVT::i1: return "MVT::i1";
54 case MVT::i8: return "MVT::i8";
55 case MVT::i16: return "MVT::i16";
56 case MVT::i32: return "MVT::i32";
57 case MVT::i64: return "MVT::i64";
58 case MVT::i128: return "MVT::i128";
59 case MVT::iAny: return "MVT::iAny";
60 case MVT::fAny: return "MVT::fAny";
61 case MVT::vAny: return "MVT::vAny";
62 case MVT::f16: return "MVT::f16";
63 case MVT::f32: return "MVT::f32";
64 case MVT::f64: return "MVT::f64";
65 case MVT::f80: return "MVT::f80";
66 case MVT::f128: return "MVT::f128";
67 case MVT::ppcf128: return "MVT::ppcf128";
68 case MVT::x86mmx: return "MVT::x86mmx";
69 case MVT::Glue: return "MVT::Glue";
70 case MVT::isVoid: return "MVT::isVoid";
71 case MVT::v2i8: return "MVT::v2i8";
72 case MVT::v4i8: return "MVT::v4i8";
73 case MVT::v8i8: return "MVT::v8i8";
74 case MVT::v16i8: return "MVT::v16i8";
75 case MVT::v32i8: return "MVT::v32i8";
76 case MVT::v2i16: return "MVT::v2i16";
77 case MVT::v4i16: return "MVT::v4i16";
78 case MVT::v8i16: return "MVT::v8i16";
79 case MVT::v16i16: return "MVT::v16i16";
80 case MVT::v2i32: return "MVT::v2i32";
81 case MVT::v4i32: return "MVT::v4i32";
82 case MVT::v8i32: return "MVT::v8i32";
83 case MVT::v1i64: return "MVT::v1i64";
84 case MVT::v2i64: return "MVT::v2i64";
85 case MVT::v4i64: return "MVT::v4i64";
86 case MVT::v8i64: return "MVT::v8i64";
87 case MVT::v2f16: return "MVT::v2f16";
88 case MVT::v2f32: return "MVT::v2f32";
89 case MVT::v4f32: return "MVT::v4f32";
90 case MVT::v8f32: return "MVT::v8f32";
91 case MVT::v2f64: return "MVT::v2f64";
92 case MVT::v4f64: return "MVT::v4f64";
93 case MVT::Metadata: return "MVT::Metadata";
94 case MVT::iPTR: return "MVT::iPTR";
95 case MVT::iPTRAny: return "MVT::iPTRAny";
96 case MVT::Untyped: return "MVT::Untyped";
97 default: llvm_unreachable("ILLEGAL VALUE TYPE!");
98 }
99 }
100
101 /// getQualifiedName - Return the name of the specified record, with a
102 /// namespace qualifier if the record contains one.
103 ///
getQualifiedName(const Record * R)104 std::string llvm::getQualifiedName(const Record *R) {
105 std::string Namespace;
106 if (R->getValue("Namespace"))
107 Namespace = R->getValueAsString("Namespace");
108 if (Namespace.empty()) return R->getName();
109 return Namespace + "::" + R->getName();
110 }
111
112
113 /// getTarget - Return the current instance of the Target class.
114 ///
CodeGenTarget(RecordKeeper & records)115 CodeGenTarget::CodeGenTarget(RecordKeeper &records)
116 : Records(records), RegBank(0), SchedModels(0) {
117 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
118 if (Targets.size() == 0)
119 throw std::string("ERROR: No 'Target' subclasses defined!");
120 if (Targets.size() != 1)
121 throw std::string("ERROR: Multiple subclasses of Target defined!");
122 TargetRec = Targets[0];
123 }
124
~CodeGenTarget()125 CodeGenTarget::~CodeGenTarget() {
126 delete RegBank;
127 delete SchedModels;
128 }
129
getName() const130 const std::string &CodeGenTarget::getName() const {
131 return TargetRec->getName();
132 }
133
getInstNamespace() const134 std::string CodeGenTarget::getInstNamespace() const {
135 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
136 // Make sure not to pick up "TargetOpcode" by accidentally getting
137 // the namespace off the PHI instruction or something.
138 if ((*i)->Namespace != "TargetOpcode")
139 return (*i)->Namespace;
140 }
141
142 return "";
143 }
144
getInstructionSet() const145 Record *CodeGenTarget::getInstructionSet() const {
146 return TargetRec->getValueAsDef("InstructionSet");
147 }
148
149
150 /// getAsmParser - Return the AssemblyParser definition for this target.
151 ///
getAsmParser() const152 Record *CodeGenTarget::getAsmParser() const {
153 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
154 if (AsmParserNum >= LI.size())
155 throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!";
156 return LI[AsmParserNum];
157 }
158
159 /// getAsmParserVariant - Return the AssmblyParserVariant definition for
160 /// this target.
161 ///
getAsmParserVariant(unsigned i) const162 Record *CodeGenTarget::getAsmParserVariant(unsigned i) const {
163 std::vector<Record*> LI =
164 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
165 if (i >= LI.size())
166 throw "Target does not have an AsmParserVariant #" + utostr(i) + "!";
167 return LI[i];
168 }
169
170 /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
171 /// available for this target.
172 ///
getAsmParserVariantCount() const173 unsigned CodeGenTarget::getAsmParserVariantCount() const {
174 std::vector<Record*> LI =
175 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
176 return LI.size();
177 }
178
179 /// getAsmWriter - Return the AssemblyWriter definition for this target.
180 ///
getAsmWriter() const181 Record *CodeGenTarget::getAsmWriter() const {
182 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
183 if (AsmWriterNum >= LI.size())
184 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
185 return LI[AsmWriterNum];
186 }
187
getRegBank() const188 CodeGenRegBank &CodeGenTarget::getRegBank() const {
189 if (!RegBank)
190 RegBank = new CodeGenRegBank(Records);
191 return *RegBank;
192 }
193
ReadRegAltNameIndices() const194 void CodeGenTarget::ReadRegAltNameIndices() const {
195 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex");
196 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord());
197 }
198
199 /// getRegisterByName - If there is a register with the specific AsmName,
200 /// return it.
getRegisterByName(StringRef Name) const201 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
202 const std::vector<CodeGenRegister*> &Regs = getRegBank().getRegisters();
203 for (unsigned i = 0, e = Regs.size(); i != e; ++i)
204 if (Regs[i]->TheDef->getValueAsString("AsmName") == Name)
205 return Regs[i];
206
207 return 0;
208 }
209
210 std::vector<MVT::SimpleValueType> CodeGenTarget::
getRegisterVTs(Record * R) const211 getRegisterVTs(Record *R) const {
212 const CodeGenRegister *Reg = getRegBank().getReg(R);
213 std::vector<MVT::SimpleValueType> Result;
214 ArrayRef<CodeGenRegisterClass*> RCs = getRegBank().getRegClasses();
215 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
216 const CodeGenRegisterClass &RC = *RCs[i];
217 if (RC.contains(Reg)) {
218 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
219 Result.insert(Result.end(), InVTs.begin(), InVTs.end());
220 }
221 }
222
223 // Remove duplicates.
224 array_pod_sort(Result.begin(), Result.end());
225 Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
226 return Result;
227 }
228
229
ReadLegalValueTypes() const230 void CodeGenTarget::ReadLegalValueTypes() const {
231 ArrayRef<CodeGenRegisterClass*> RCs = getRegBank().getRegClasses();
232 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
233 for (unsigned ri = 0, re = RCs[i]->VTs.size(); ri != re; ++ri)
234 LegalValueTypes.push_back(RCs[i]->VTs[ri]);
235
236 // Remove duplicates.
237 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
238 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
239 LegalValueTypes.end()),
240 LegalValueTypes.end());
241 }
242
getSchedModels() const243 CodeGenSchedModels &CodeGenTarget::getSchedModels() const {
244 if (!SchedModels)
245 SchedModels = new CodeGenSchedModels(Records, *this);
246 return *SchedModels;
247 }
248
ReadInstructions() const249 void CodeGenTarget::ReadInstructions() const {
250 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
251 if (Insts.size() <= 2)
252 throw std::string("No 'Instruction' subclasses defined!");
253
254 // Parse the instructions defined in the .td file.
255 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
256 Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]);
257 }
258
259 static const CodeGenInstruction *
GetInstByName(const char * Name,const DenseMap<const Record *,CodeGenInstruction * > & Insts,RecordKeeper & Records)260 GetInstByName(const char *Name,
261 const DenseMap<const Record*, CodeGenInstruction*> &Insts,
262 RecordKeeper &Records) {
263 const Record *Rec = Records.getDef(Name);
264
265 DenseMap<const Record*, CodeGenInstruction*>::const_iterator
266 I = Insts.find(Rec);
267 if (Rec == 0 || I == Insts.end())
268 throw std::string("Could not find '") + Name + "' instruction!";
269 return I->second;
270 }
271
272 namespace {
273 /// SortInstByName - Sorting predicate to sort instructions by name.
274 ///
275 struct SortInstByName {
operator ()__anon7305d3ff0111::SortInstByName276 bool operator()(const CodeGenInstruction *Rec1,
277 const CodeGenInstruction *Rec2) const {
278 return Rec1->TheDef->getName() < Rec2->TheDef->getName();
279 }
280 };
281 }
282
283 /// getInstructionsByEnumValue - Return all of the instructions defined by the
284 /// target, ordered by their enum value.
ComputeInstrsByEnum() const285 void CodeGenTarget::ComputeInstrsByEnum() const {
286 // The ordering here must match the ordering in TargetOpcodes.h.
287 const char *const FixedInstrs[] = {
288 "PHI",
289 "INLINEASM",
290 "PROLOG_LABEL",
291 "EH_LABEL",
292 "GC_LABEL",
293 "KILL",
294 "EXTRACT_SUBREG",
295 "INSERT_SUBREG",
296 "IMPLICIT_DEF",
297 "SUBREG_TO_REG",
298 "COPY_TO_REGCLASS",
299 "DBG_VALUE",
300 "REG_SEQUENCE",
301 "COPY",
302 "BUNDLE",
303 "LIFETIME_START",
304 "LIFETIME_END",
305 0
306 };
307 const DenseMap<const Record*, CodeGenInstruction*> &Insts = getInstructions();
308 for (const char *const *p = FixedInstrs; *p; ++p) {
309 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
310 assert(Instr && "Missing target independent instruction");
311 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
312 InstrsByEnum.push_back(Instr);
313 }
314 unsigned EndOfPredefines = InstrsByEnum.size();
315
316 for (DenseMap<const Record*, CodeGenInstruction*>::const_iterator
317 I = Insts.begin(), E = Insts.end(); I != E; ++I) {
318 const CodeGenInstruction *CGI = I->second;
319 if (CGI->Namespace != "TargetOpcode")
320 InstrsByEnum.push_back(CGI);
321 }
322
323 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
324
325 // All of the instructions are now in random order based on the map iteration.
326 // Sort them by name.
327 std::sort(InstrsByEnum.begin()+EndOfPredefines, InstrsByEnum.end(),
328 SortInstByName());
329 }
330
331
332 /// isLittleEndianEncoding - Return whether this target encodes its instruction
333 /// in little-endian format, i.e. bits laid out in the order [0..n]
334 ///
isLittleEndianEncoding() const335 bool CodeGenTarget::isLittleEndianEncoding() const {
336 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
337 }
338
339 /// guessInstructionProperties - Return true if it's OK to guess instruction
340 /// properties instead of raising an error.
341 ///
342 /// This is configurable as a temporary migration aid. It will eventually be
343 /// permanently false.
guessInstructionProperties() const344 bool CodeGenTarget::guessInstructionProperties() const {
345 return getInstructionSet()->getValueAsBit("guessInstructionProperties");
346 }
347
348 //===----------------------------------------------------------------------===//
349 // ComplexPattern implementation
350 //
ComplexPattern(Record * R)351 ComplexPattern::ComplexPattern(Record *R) {
352 Ty = ::getValueType(R->getValueAsDef("Ty"));
353 NumOperands = R->getValueAsInt("NumOperands");
354 SelectFunc = R->getValueAsString("SelectFunc");
355 RootNodes = R->getValueAsListOfDefs("RootNodes");
356
357 // Parse the properties.
358 Properties = 0;
359 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
360 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
361 if (PropList[i]->getName() == "SDNPHasChain") {
362 Properties |= 1 << SDNPHasChain;
363 } else if (PropList[i]->getName() == "SDNPOptInGlue") {
364 Properties |= 1 << SDNPOptInGlue;
365 } else if (PropList[i]->getName() == "SDNPMayStore") {
366 Properties |= 1 << SDNPMayStore;
367 } else if (PropList[i]->getName() == "SDNPMayLoad") {
368 Properties |= 1 << SDNPMayLoad;
369 } else if (PropList[i]->getName() == "SDNPSideEffect") {
370 Properties |= 1 << SDNPSideEffect;
371 } else if (PropList[i]->getName() == "SDNPMemOperand") {
372 Properties |= 1 << SDNPMemOperand;
373 } else if (PropList[i]->getName() == "SDNPVariadic") {
374 Properties |= 1 << SDNPVariadic;
375 } else if (PropList[i]->getName() == "SDNPWantRoot") {
376 Properties |= 1 << SDNPWantRoot;
377 } else if (PropList[i]->getName() == "SDNPWantParent") {
378 Properties |= 1 << SDNPWantParent;
379 } else {
380 errs() << "Unsupported SD Node property '" << PropList[i]->getName()
381 << "' on ComplexPattern '" << R->getName() << "'!\n";
382 exit(1);
383 }
384 }
385
386 //===----------------------------------------------------------------------===//
387 // CodeGenIntrinsic Implementation
388 //===----------------------------------------------------------------------===//
389
LoadIntrinsics(const RecordKeeper & RC,bool TargetOnly)390 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
391 bool TargetOnly) {
392 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
393
394 std::vector<CodeGenIntrinsic> Result;
395
396 for (unsigned i = 0, e = I.size(); i != e; ++i) {
397 bool isTarget = I[i]->getValueAsBit("isTarget");
398 if (isTarget == TargetOnly)
399 Result.push_back(CodeGenIntrinsic(I[i]));
400 }
401 return Result;
402 }
403
CodeGenIntrinsic(Record * R)404 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
405 TheDef = R;
406 std::string DefName = R->getName();
407 ModRef = ReadWriteMem;
408 isOverloaded = false;
409 isCommutative = false;
410 canThrow = false;
411 isNoReturn = false;
412
413 if (DefName.size() <= 4 ||
414 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
415 throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
416
417 EnumName = std::string(DefName.begin()+4, DefName.end());
418
419 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
420 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
421
422 TargetPrefix = R->getValueAsString("TargetPrefix");
423 Name = R->getValueAsString("LLVMName");
424
425 if (Name == "") {
426 // If an explicit name isn't specified, derive one from the DefName.
427 Name = "llvm.";
428
429 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
430 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
431 } else {
432 // Verify it starts with "llvm.".
433 if (Name.size() <= 5 ||
434 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
435 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
436 }
437
438 // If TargetPrefix is specified, make sure that Name starts with
439 // "llvm.<targetprefix>.".
440 if (!TargetPrefix.empty()) {
441 if (Name.size() < 6+TargetPrefix.size() ||
442 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
443 != (TargetPrefix + "."))
444 throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
445 TargetPrefix + ".'!";
446 }
447
448 // Parse the list of return types.
449 std::vector<MVT::SimpleValueType> OverloadedVTs;
450 ListInit *TypeList = R->getValueAsListInit("RetTypes");
451 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
452 Record *TyEl = TypeList->getElementAsRecord(i);
453 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
454 MVT::SimpleValueType VT;
455 if (TyEl->isSubClassOf("LLVMMatchType")) {
456 unsigned MatchTy = TyEl->getValueAsInt("Number");
457 assert(MatchTy < OverloadedVTs.size() &&
458 "Invalid matching number!");
459 VT = OverloadedVTs[MatchTy];
460 // It only makes sense to use the extended and truncated vector element
461 // variants with iAny types; otherwise, if the intrinsic is not
462 // overloaded, all the types can be specified directly.
463 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
464 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
465 VT == MVT::iAny || VT == MVT::vAny) &&
466 "Expected iAny or vAny type");
467 } else {
468 VT = getValueType(TyEl->getValueAsDef("VT"));
469 }
470 if (EVT(VT).isOverloaded()) {
471 OverloadedVTs.push_back(VT);
472 isOverloaded = true;
473 }
474
475 // Reject invalid types.
476 if (VT == MVT::isVoid)
477 throw "Intrinsic '" + DefName + " has void in result type list!";
478
479 IS.RetVTs.push_back(VT);
480 IS.RetTypeDefs.push_back(TyEl);
481 }
482
483 // Parse the list of parameter types.
484 TypeList = R->getValueAsListInit("ParamTypes");
485 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
486 Record *TyEl = TypeList->getElementAsRecord(i);
487 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
488 MVT::SimpleValueType VT;
489 if (TyEl->isSubClassOf("LLVMMatchType")) {
490 unsigned MatchTy = TyEl->getValueAsInt("Number");
491 assert(MatchTy < OverloadedVTs.size() &&
492 "Invalid matching number!");
493 VT = OverloadedVTs[MatchTy];
494 // It only makes sense to use the extended and truncated vector element
495 // variants with iAny types; otherwise, if the intrinsic is not
496 // overloaded, all the types can be specified directly.
497 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
498 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
499 VT == MVT::iAny || VT == MVT::vAny) &&
500 "Expected iAny or vAny type");
501 } else
502 VT = getValueType(TyEl->getValueAsDef("VT"));
503
504 if (EVT(VT).isOverloaded()) {
505 OverloadedVTs.push_back(VT);
506 isOverloaded = true;
507 }
508
509 // Reject invalid types.
510 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
511 throw "Intrinsic '" + DefName + " has void in result type list!";
512
513 IS.ParamVTs.push_back(VT);
514 IS.ParamTypeDefs.push_back(TyEl);
515 }
516
517 // Parse the intrinsic properties.
518 ListInit *PropList = R->getValueAsListInit("Properties");
519 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
520 Record *Property = PropList->getElementAsRecord(i);
521 assert(Property->isSubClassOf("IntrinsicProperty") &&
522 "Expected a property!");
523
524 if (Property->getName() == "IntrNoMem")
525 ModRef = NoMem;
526 else if (Property->getName() == "IntrReadArgMem")
527 ModRef = ReadArgMem;
528 else if (Property->getName() == "IntrReadMem")
529 ModRef = ReadMem;
530 else if (Property->getName() == "IntrReadWriteArgMem")
531 ModRef = ReadWriteArgMem;
532 else if (Property->getName() == "Commutative")
533 isCommutative = true;
534 else if (Property->getName() == "Throws")
535 canThrow = true;
536 else if (Property->getName() == "IntrNoReturn")
537 isNoReturn = true;
538 else if (Property->isSubClassOf("NoCapture")) {
539 unsigned ArgNo = Property->getValueAsInt("ArgNo");
540 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
541 } else
542 llvm_unreachable("Unknown property!");
543 }
544
545 // Sort the argument attributes for later benefit.
546 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end());
547 }
548