1 //===-- MipsBaseInfo.h - Top level definitions for MIPS MC ------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains small standalone helper functions and enum definitions for
11 // the Mips target useful for the compiler back-end and the MC libraries.
12 //
13 //===----------------------------------------------------------------------===//
14 #ifndef MIPSBASEINFO_H
15 #define MIPSBASEINFO_H
16
17 #include "MipsFixupKinds.h"
18 #include "MipsMCTargetDesc.h"
19 #include "llvm/MC/MCExpr.h"
20 #include "llvm/Support/DataTypes.h"
21 #include "llvm/Support/ErrorHandling.h"
22
23 namespace llvm {
24
25 /// MipsII - This namespace holds all of the target specific flags that
26 /// instruction info tracks.
27 ///
28 namespace MipsII {
29 /// Target Operand Flag enum.
30 enum TOF {
31 //===------------------------------------------------------------------===//
32 // Mips Specific MachineOperand flags.
33
34 MO_NO_FLAG,
35
36 /// MO_GOT16 - Represents the offset into the global offset table at which
37 /// the address the relocation entry symbol resides during execution.
38 MO_GOT16,
39 MO_GOT,
40
41 /// MO_GOT_CALL - Represents the offset into the global offset table at
42 /// which the address of a call site relocation entry symbol resides
43 /// during execution. This is different from the above since this flag
44 /// can only be present in call instructions.
45 MO_GOT_CALL,
46
47 /// MO_GPREL - Represents the offset from the current gp value to be used
48 /// for the relocatable object file being produced.
49 MO_GPREL,
50
51 /// MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol
52 /// address.
53 MO_ABS_HI,
54 MO_ABS_LO,
55
56 /// MO_TLSGD - Represents the offset into the global offset table at which
57 // the module ID and TSL block offset reside during execution (General
58 // Dynamic TLS).
59 MO_TLSGD,
60
61 /// MO_TLSLDM - Represents the offset into the global offset table at which
62 // the module ID and TSL block offset reside during execution (Local
63 // Dynamic TLS).
64 MO_TLSLDM,
65 MO_DTPREL_HI,
66 MO_DTPREL_LO,
67
68 /// MO_GOTTPREL - Represents the offset from the thread pointer (Initial
69 // Exec TLS).
70 MO_GOTTPREL,
71
72 /// MO_TPREL_HI/LO - Represents the hi and low part of the offset from
73 // the thread pointer (Local Exec TLS).
74 MO_TPREL_HI,
75 MO_TPREL_LO,
76
77 // N32/64 Flags.
78 MO_GPOFF_HI,
79 MO_GPOFF_LO,
80 MO_GOT_DISP,
81 MO_GOT_PAGE,
82 MO_GOT_OFST,
83
84 /// MO_HIGHER/HIGHEST - Represents the highest or higher half word of a
85 /// 64-bit symbol address.
86 MO_HIGHER,
87 MO_HIGHEST
88 };
89
90 enum {
91 //===------------------------------------------------------------------===//
92 // Instruction encodings. These are the standard/most common forms for
93 // Mips instructions.
94 //
95
96 // Pseudo - This represents an instruction that is a pseudo instruction
97 // or one that has not been implemented yet. It is illegal to code generate
98 // it, but tolerated for intermediate implementation stages.
99 Pseudo = 0,
100
101 /// FrmR - This form is for instructions of the format R.
102 FrmR = 1,
103 /// FrmI - This form is for instructions of the format I.
104 FrmI = 2,
105 /// FrmJ - This form is for instructions of the format J.
106 FrmJ = 3,
107 /// FrmFR - This form is for instructions of the format FR.
108 FrmFR = 4,
109 /// FrmFI - This form is for instructions of the format FI.
110 FrmFI = 5,
111 /// FrmOther - This form is for instructions that have no specific format.
112 FrmOther = 6,
113
114 FormMask = 15
115 };
116 }
117
118
119 /// getMipsRegisterNumbering - Given the enum value for some register,
120 /// return the number that it corresponds to.
getMipsRegisterNumbering(unsigned RegEnum)121 inline static unsigned getMipsRegisterNumbering(unsigned RegEnum)
122 {
123 switch (RegEnum) {
124 case Mips::ZERO: case Mips::ZERO_64: case Mips::F0: case Mips::D0_64:
125 case Mips::D0: case Mips::FCC0:
126 return 0;
127 case Mips::AT: case Mips::AT_64: case Mips::F1: case Mips::D1_64:
128 return 1;
129 case Mips::V0: case Mips::V0_64: case Mips::F2: case Mips::D2_64:
130 case Mips::D1:
131 return 2;
132 case Mips::V1: case Mips::V1_64: case Mips::F3: case Mips::D3_64:
133 return 3;
134 case Mips::A0: case Mips::A0_64: case Mips::F4: case Mips::D4_64:
135 case Mips::D2:
136 return 4;
137 case Mips::A1: case Mips::A1_64: case Mips::F5: case Mips::D5_64:
138 return 5;
139 case Mips::A2: case Mips::A2_64: case Mips::F6: case Mips::D6_64:
140 case Mips::D3:
141 return 6;
142 case Mips::A3: case Mips::A3_64: case Mips::F7: case Mips::D7_64:
143 return 7;
144 case Mips::T0: case Mips::T0_64: case Mips::F8: case Mips::D8_64:
145 case Mips::D4:
146 return 8;
147 case Mips::T1: case Mips::T1_64: case Mips::F9: case Mips::D9_64:
148 return 9;
149 case Mips::T2: case Mips::T2_64: case Mips::F10: case Mips::D10_64:
150 case Mips::D5:
151 return 10;
152 case Mips::T3: case Mips::T3_64: case Mips::F11: case Mips::D11_64:
153 return 11;
154 case Mips::T4: case Mips::T4_64: case Mips::F12: case Mips::D12_64:
155 case Mips::D6:
156 return 12;
157 case Mips::T5: case Mips::T5_64: case Mips::F13: case Mips::D13_64:
158 return 13;
159 case Mips::T6: case Mips::T6_64: case Mips::F14: case Mips::D14_64:
160 case Mips::D7:
161 return 14;
162 case Mips::T7: case Mips::T7_64: case Mips::F15: case Mips::D15_64:
163 return 15;
164 case Mips::S0: case Mips::S0_64: case Mips::F16: case Mips::D16_64:
165 case Mips::D8:
166 return 16;
167 case Mips::S1: case Mips::S1_64: case Mips::F17: case Mips::D17_64:
168 return 17;
169 case Mips::S2: case Mips::S2_64: case Mips::F18: case Mips::D18_64:
170 case Mips::D9:
171 return 18;
172 case Mips::S3: case Mips::S3_64: case Mips::F19: case Mips::D19_64:
173 return 19;
174 case Mips::S4: case Mips::S4_64: case Mips::F20: case Mips::D20_64:
175 case Mips::D10:
176 return 20;
177 case Mips::S5: case Mips::S5_64: case Mips::F21: case Mips::D21_64:
178 return 21;
179 case Mips::S6: case Mips::S6_64: case Mips::F22: case Mips::D22_64:
180 case Mips::D11:
181 return 22;
182 case Mips::S7: case Mips::S7_64: case Mips::F23: case Mips::D23_64:
183 return 23;
184 case Mips::T8: case Mips::T8_64: case Mips::F24: case Mips::D24_64:
185 case Mips::D12:
186 return 24;
187 case Mips::T9: case Mips::T9_64: case Mips::F25: case Mips::D25_64:
188 return 25;
189 case Mips::K0: case Mips::K0_64: case Mips::F26: case Mips::D26_64:
190 case Mips::D13:
191 return 26;
192 case Mips::K1: case Mips::K1_64: case Mips::F27: case Mips::D27_64:
193 return 27;
194 case Mips::GP: case Mips::GP_64: case Mips::F28: case Mips::D28_64:
195 case Mips::D14:
196 return 28;
197 case Mips::SP: case Mips::SP_64: case Mips::F29: case Mips::D29_64:
198 case Mips::HWR29:
199 return 29;
200 case Mips::FP: case Mips::FP_64: case Mips::F30: case Mips::D30_64:
201 case Mips::D15:
202 return 30;
203 case Mips::RA: case Mips::RA_64: case Mips::F31: case Mips::D31_64:
204 return 31;
205 default: llvm_unreachable("Unknown register number!");
206 }
207 }
208
209 inline static std::pair<const MCSymbolRefExpr*, int64_t>
MipsGetSymAndOffset(const MCFixup & Fixup)210 MipsGetSymAndOffset(const MCFixup &Fixup) {
211 MCFixupKind FixupKind = Fixup.getKind();
212
213 if ((FixupKind < FirstTargetFixupKind) ||
214 (FixupKind >= MCFixupKind(Mips::LastTargetFixupKind)))
215 return std::make_pair((const MCSymbolRefExpr*)0, (int64_t)0);
216
217 const MCExpr *Expr = Fixup.getValue();
218 MCExpr::ExprKind Kind = Expr->getKind();
219
220 if (Kind == MCExpr::Binary) {
221 const MCBinaryExpr *BE = static_cast<const MCBinaryExpr*>(Expr);
222 const MCExpr *LHS = BE->getLHS();
223 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(BE->getRHS());
224
225 if ((LHS->getKind() != MCExpr::SymbolRef) || !CE)
226 return std::make_pair((const MCSymbolRefExpr*)0, (int64_t)0);
227
228 return std::make_pair(cast<MCSymbolRefExpr>(LHS), CE->getValue());
229 }
230
231 if (Kind != MCExpr::SymbolRef)
232 return std::make_pair((const MCSymbolRefExpr*)0, (int64_t)0);
233
234 return std::make_pair(cast<MCSymbolRefExpr>(Expr), 0);
235 }
236 }
237
238 #endif
239