1 //===-- LiveStackAnalysis.h - Live Stack Slot Analysis ----------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the live stack slot analysis pass. It is analogous to 11 // live interval analysis except it's analyzing liveness of stack slots rather 12 // than registers. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #ifndef LLVM_CODEGEN_LIVESTACK_ANALYSIS_H 17 #define LLVM_CODEGEN_LIVESTACK_ANALYSIS_H 18 19 #include "llvm/CodeGen/MachineFunctionPass.h" 20 #include "llvm/CodeGen/LiveInterval.h" 21 #include "llvm/Target/TargetRegisterInfo.h" 22 #include "llvm/Support/Allocator.h" 23 #include <map> 24 25 namespace llvm { 26 27 class LiveStacks : public MachineFunctionPass { 28 const TargetRegisterInfo *TRI; 29 30 /// Special pool allocator for VNInfo's (LiveInterval val#). 31 /// 32 VNInfo::Allocator VNInfoAllocator; 33 34 /// S2IMap - Stack slot indices to live interval mapping. 35 /// 36 typedef std::map<int, LiveInterval> SS2IntervalMap; 37 SS2IntervalMap S2IMap; 38 39 /// S2RCMap - Stack slot indices to register class mapping. 40 std::map<int, const TargetRegisterClass*> S2RCMap; 41 42 public: 43 static char ID; // Pass identification, replacement for typeid LiveStacks()44 LiveStacks() : MachineFunctionPass(ID) { 45 initializeLiveStacksPass(*PassRegistry::getPassRegistry()); 46 } 47 48 typedef SS2IntervalMap::iterator iterator; 49 typedef SS2IntervalMap::const_iterator const_iterator; begin()50 const_iterator begin() const { return S2IMap.begin(); } end()51 const_iterator end() const { return S2IMap.end(); } begin()52 iterator begin() { return S2IMap.begin(); } end()53 iterator end() { return S2IMap.end(); } 54 getNumIntervals()55 unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); } 56 57 LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC); 58 getInterval(int Slot)59 LiveInterval &getInterval(int Slot) { 60 assert(Slot >= 0 && "Spill slot indice must be >= 0"); 61 SS2IntervalMap::iterator I = S2IMap.find(Slot); 62 assert(I != S2IMap.end() && "Interval does not exist for stack slot"); 63 return I->second; 64 } 65 getInterval(int Slot)66 const LiveInterval &getInterval(int Slot) const { 67 assert(Slot >= 0 && "Spill slot indice must be >= 0"); 68 SS2IntervalMap::const_iterator I = S2IMap.find(Slot); 69 assert(I != S2IMap.end() && "Interval does not exist for stack slot"); 70 return I->second; 71 } 72 hasInterval(int Slot)73 bool hasInterval(int Slot) const { 74 return S2IMap.count(Slot); 75 } 76 getIntervalRegClass(int Slot)77 const TargetRegisterClass *getIntervalRegClass(int Slot) const { 78 assert(Slot >= 0 && "Spill slot indice must be >= 0"); 79 std::map<int, const TargetRegisterClass*>::const_iterator 80 I = S2RCMap.find(Slot); 81 assert(I != S2RCMap.end() && 82 "Register class info does not exist for stack slot"); 83 return I->second; 84 } 85 getVNInfoAllocator()86 VNInfo::Allocator& getVNInfoAllocator() { return VNInfoAllocator; } 87 88 virtual void getAnalysisUsage(AnalysisUsage &AU) const; 89 virtual void releaseMemory(); 90 91 /// runOnMachineFunction - pass entry point 92 virtual bool runOnMachineFunction(MachineFunction&); 93 94 /// print - Implement the dump method. 95 virtual void print(raw_ostream &O, const Module* = 0) const; 96 }; 97 } 98 99 #endif /* LLVM_CODEGEN_LIVESTACK_ANALYSIS_H */ 100