1 /*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #define TCG_TARGET_I386 1
25
26 #if defined(__x86_64__)
27 # define TCG_TARGET_REG_BITS 64
28 #else
29 #define TCG_TARGET_REG_BITS 32
30 #endif
31 //#define TCG_TARGET_WORDS_BIGENDIAN
32
33 #if TCG_TARGET_REG_BITS == 64
34 # define TCG_TARGET_NB_REGS 16
35 #else
36 #define TCG_TARGET_NB_REGS 8
37 #endif
38
39 enum {
40 TCG_REG_EAX = 0,
41 TCG_REG_ECX,
42 TCG_REG_EDX,
43 TCG_REG_EBX,
44 TCG_REG_ESP,
45 TCG_REG_EBP,
46 TCG_REG_ESI,
47 TCG_REG_EDI,
48
49 /* 64-bit registers; always define the symbols to avoid
50 too much if-deffing. */
51 TCG_REG_R8,
52 TCG_REG_R9,
53 TCG_REG_R10,
54 TCG_REG_R11,
55 TCG_REG_R12,
56 TCG_REG_R13,
57 TCG_REG_R14,
58 TCG_REG_R15,
59 TCG_REG_RAX = TCG_REG_EAX,
60 TCG_REG_RCX = TCG_REG_ECX,
61 TCG_REG_RDX = TCG_REG_EDX,
62 TCG_REG_RBX = TCG_REG_EBX,
63 TCG_REG_RSP = TCG_REG_ESP,
64 TCG_REG_RBP = TCG_REG_EBP,
65 TCG_REG_RSI = TCG_REG_ESI,
66 TCG_REG_RDI = TCG_REG_EDI,
67 };
68
69 #define TCG_CT_CONST_S32 0x100
70 #define TCG_CT_CONST_U32 0x200
71
72 /* used for function call generation */
73 #define TCG_REG_CALL_STACK TCG_REG_ESP
74 #define TCG_TARGET_STACK_ALIGN 16
75 #define TCG_TARGET_CALL_STACK_OFFSET 0
76
77 /* optional instructions */
78 #define TCG_TARGET_HAS_div2_i32
79 #define TCG_TARGET_HAS_rot_i32
80 #define TCG_TARGET_HAS_ext8s_i32
81 #define TCG_TARGET_HAS_ext16s_i32
82 #define TCG_TARGET_HAS_ext8u_i32
83 #define TCG_TARGET_HAS_ext16u_i32
84 #define TCG_TARGET_HAS_bswap16_i32
85 #define TCG_TARGET_HAS_bswap32_i32
86 #define TCG_TARGET_HAS_neg_i32
87 #define TCG_TARGET_HAS_not_i32
88 // #define TCG_TARGET_HAS_andc_i32
89 // #define TCG_TARGET_HAS_orc_i32
90 // #define TCG_TARGET_HAS_eqv_i32
91 // #define TCG_TARGET_HAS_nand_i32
92 // #define TCG_TARGET_HAS_nor_i32
93
94 #if TCG_TARGET_REG_BITS == 64
95 #define TCG_TARGET_HAS_div2_i64
96 #define TCG_TARGET_HAS_rot_i64
97 #define TCG_TARGET_HAS_ext8s_i64
98 #define TCG_TARGET_HAS_ext16s_i64
99 #define TCG_TARGET_HAS_ext32s_i64
100 #define TCG_TARGET_HAS_ext8u_i64
101 #define TCG_TARGET_HAS_ext16u_i64
102 #define TCG_TARGET_HAS_ext32u_i64
103 #define TCG_TARGET_HAS_bswap16_i64
104 #define TCG_TARGET_HAS_bswap32_i64
105 #define TCG_TARGET_HAS_bswap64_i64
106 #define TCG_TARGET_HAS_neg_i64
107 #define TCG_TARGET_HAS_not_i64
108 // #define TCG_TARGET_HAS_andc_i64
109 // #define TCG_TARGET_HAS_orc_i64
110 // #define TCG_TARGET_HAS_eqv_i64
111 // #define TCG_TARGET_HAS_nand_i64
112 // #define TCG_TARGET_HAS_nor_i64
113 #endif
114
115 #define TCG_TARGET_HAS_GUEST_BASE
116
117 /* Note: must be synced with dyngen-exec.h */
118 #if TCG_TARGET_REG_BITS == 64
119 #define TCG_AREG0 TCG_REG_R14
120 #define TCG_AREG1 TCG_REG_R15
121 #define TCG_AREG2 TCG_REG_R12
122 #else
123 #define TCG_AREG0 TCG_REG_EBP
124 #define TCG_AREG1 TCG_REG_EBX
125 #define TCG_AREG2 TCG_REG_ESI
126 #endif
127
flush_icache_range(unsigned long start,unsigned long stop)128 static inline void flush_icache_range(unsigned long start, unsigned long stop)
129 {
130 }
131