• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 //===-- ARMMCTargetDesc.h - ARM Target Descriptions -------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides ARM specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef ARMMCTARGETDESC_H
15 #define ARMMCTARGETDESC_H
16 
17 #include "llvm/Support/DataTypes.h"
18 #include <string>
19 
20 namespace llvm {
21 class MCAsmBackend;
22 class MCCodeEmitter;
23 class MCContext;
24 class MCInstrInfo;
25 class MCObjectWriter;
26 class MCRegisterInfo;
27 class MCSubtargetInfo;
28 class StringRef;
29 class Target;
30 class raw_ostream;
31 
32 extern Target TheARMTarget, TheThumbTarget;
33 
34 namespace ARM_MC {
35   std::string ParseARMTriple(StringRef TT, StringRef CPU);
36 
37   /// createARMMCSubtargetInfo - Create a ARM MCSubtargetInfo instance.
38   /// This is exposed so Asm parser, etc. do not need to go through
39   /// TargetRegistry.
40   MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
41                                             StringRef FS);
42 }
43 
44 MCCodeEmitter *createARMMCCodeEmitter(const MCInstrInfo &MCII,
45                                       const MCRegisterInfo &MRI,
46                                       const MCSubtargetInfo &STI,
47                                       MCContext &Ctx);
48 
49 MCAsmBackend *createARMAsmBackend(const Target &T, StringRef TT);
50 
51 /// createARMELFObjectWriter - Construct an ELF Mach-O object writer.
52 MCObjectWriter *createARMELFObjectWriter(raw_ostream &OS,
53                                          uint8_t OSABI);
54 
55 /// createARMMachObjectWriter - Construct an ARM Mach-O object writer.
56 MCObjectWriter *createARMMachObjectWriter(raw_ostream &OS,
57                                           bool Is64Bit,
58                                           uint32_t CPUType,
59                                           uint32_t CPUSubtype);
60 
61 } // End llvm namespace
62 
63 // Defines symbolic names for ARM registers.  This defines a mapping from
64 // register name to register number.
65 //
66 #define GET_REGINFO_ENUM
67 #include "ARMGenRegisterInfo.inc"
68 
69 // Defines symbolic names for the ARM instructions.
70 //
71 #define GET_INSTRINFO_ENUM
72 #include "ARMGenInstrInfo.inc"
73 
74 #define GET_SUBTARGETINFO_ENUM
75 #include "ARMGenSubtargetInfo.inc"
76 
77 #endif
78