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1 //===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Thumb-1 implementation of the TargetInstrInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef THUMB1INSTRUCTIONINFO_H
15 #define THUMB1INSTRUCTIONINFO_H
16 
17 #include "ARM.h"
18 #include "ARMBaseInstrInfo.h"
19 #include "Thumb1RegisterInfo.h"
20 
21 namespace llvm {
22   class ARMSubtarget;
23 
24 class Thumb1InstrInfo : public ARMBaseInstrInfo {
25   Thumb1RegisterInfo RI;
26 public:
27   explicit Thumb1InstrInfo(const ARMSubtarget &STI);
28 
29   /// getNoopForMachoTarget - Return the noop instruction to use for a noop.
30   void getNoopForMachoTarget(MCInst &NopInst) const;
31 
32   // Return the non-pre/post incrementing version of 'Opc'. Return 0
33   // if there is not such an opcode.
34   unsigned getUnindexedOpcode(unsigned Opc) const;
35 
36   /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
37   /// such, whenever a client has an instance of instruction info, it should
38   /// always be able to get register info as well (through this method).
39   ///
getRegisterInfo()40   const Thumb1RegisterInfo &getRegisterInfo() const { return RI; }
41 
42   void copyPhysReg(MachineBasicBlock &MBB,
43                    MachineBasicBlock::iterator I, DebugLoc DL,
44                    unsigned DestReg, unsigned SrcReg,
45                    bool KillSrc) const;
46   void storeRegToStackSlot(MachineBasicBlock &MBB,
47                            MachineBasicBlock::iterator MBBI,
48                            unsigned SrcReg, bool isKill, int FrameIndex,
49                            const TargetRegisterClass *RC,
50                            const TargetRegisterInfo *TRI) const;
51 
52   void loadRegFromStackSlot(MachineBasicBlock &MBB,
53                             MachineBasicBlock::iterator MBBI,
54                             unsigned DestReg, int FrameIndex,
55                             const TargetRegisterClass *RC,
56                             const TargetRegisterInfo *TRI) const;
57 
58 };
59 }
60 
61 #endif // THUMB1INSTRUCTIONINFO_H
62