1; 2; Copyright (c) 2010 The WebM project authors. All Rights Reserved. 3; 4; Use of this source code is governed by a BSD-style license 5; that can be found in the LICENSE file in the root of the source 6; tree. An additional intellectual property rights grant can be found 7; in the file PATENTS. All contributing project authors may 8; be found in the AUTHORS file in the root of the source tree. 9; 10 11 12 EXPORT |vp8_short_idct4x4llm_neon| 13 ARM 14 REQUIRE8 15 PRESERVE8 16 17 AREA ||.text||, CODE, READONLY, ALIGN=2 18 19;************************************************************* 20;void vp8_short_idct4x4llm_c(short *input, short *output, int pitch) 21;r0 short * input 22;r1 short * output 23;r2 int pitch 24;************************************************************* 25;static const int cospi8sqrt2minus1=20091; 26;static const int sinpi8sqrt2 =35468; 27;static const int rounding = 0; 28;Optimization note: The resulted data from dequantization are signed 13-bit data that is 29;in the range of [-4096, 4095]. This allows to use "vqdmulh"(neon) instruction since 30;it won't go out of range (13+16+1=30bits<32bits). This instruction gives the high half 31;result of the multiplication that is needed in IDCT. 32 33|vp8_short_idct4x4llm_neon| PROC 34 adr r12, idct_coeff 35 vld1.16 {q1, q2}, [r0] 36 vld1.16 {d0}, [r12] 37 38 vswp d3, d4 ;q2(vp[4] vp[12]) 39 40 vqdmulh.s16 q3, q2, d0[2] 41 vqdmulh.s16 q4, q2, d0[0] 42 43 vqadd.s16 d12, d2, d3 ;a1 44 vqsub.s16 d13, d2, d3 ;b1 45 46 vshr.s16 q3, q3, #1 47 vshr.s16 q4, q4, #1 48 49 vqadd.s16 q3, q3, q2 ;modify since sinpi8sqrt2 > 65536/2 (negtive number) 50 vqadd.s16 q4, q4, q2 51 52 ;d6 - c1:temp1 53 ;d7 - d1:temp2 54 ;d8 - d1:temp1 55 ;d9 - c1:temp2 56 57 vqsub.s16 d10, d6, d9 ;c1 58 vqadd.s16 d11, d7, d8 ;d1 59 60 vqadd.s16 d2, d12, d11 61 vqadd.s16 d3, d13, d10 62 vqsub.s16 d4, d13, d10 63 vqsub.s16 d5, d12, d11 64 65 vtrn.32 d2, d4 66 vtrn.32 d3, d5 67 vtrn.16 d2, d3 68 vtrn.16 d4, d5 69 70 vswp d3, d4 71 72 vqdmulh.s16 q3, q2, d0[2] 73 vqdmulh.s16 q4, q2, d0[0] 74 75 vqadd.s16 d12, d2, d3 ;a1 76 vqsub.s16 d13, d2, d3 ;b1 77 78 vshr.s16 q3, q3, #1 79 vshr.s16 q4, q4, #1 80 81 vqadd.s16 q3, q3, q2 ;modify since sinpi8sqrt2 > 65536/2 (negtive number) 82 vqadd.s16 q4, q4, q2 83 84 vqsub.s16 d10, d6, d9 ;c1 85 vqadd.s16 d11, d7, d8 ;d1 86 87 vqadd.s16 d2, d12, d11 88 vqadd.s16 d3, d13, d10 89 vqsub.s16 d4, d13, d10 90 vqsub.s16 d5, d12, d11 91 92 vrshr.s16 d2, d2, #3 93 vrshr.s16 d3, d3, #3 94 vrshr.s16 d4, d4, #3 95 vrshr.s16 d5, d5, #3 96 97 add r3, r1, r2 98 add r12, r3, r2 99 add r0, r12, r2 100 101 vtrn.32 d2, d4 102 vtrn.32 d3, d5 103 vtrn.16 d2, d3 104 vtrn.16 d4, d5 105 106 vst1.16 {d2}, [r1] 107 vst1.16 {d3}, [r3] 108 vst1.16 {d4}, [r12] 109 vst1.16 {d5}, [r0] 110 111 bx lr 112 113 ENDP 114 115;----------------- 116 117idct_coeff 118 DCD 0x4e7b4e7b, 0x8a8c8a8c 119 120;20091, 20091, 35468, 35468 121 122 END 123