Searched refs:sets (Results 1 – 7 of 7) sorted by relevance
122 if (g->sets != NULL) in __weak_alias()123 free(g->sets); in __weak_alias()
184 cset *sets; /* -> cset [ncsets] */ member
288 g->sets = NULL; in regcomp()1251 if (p->g->sets == NULL) in allocset()1252 p->g->sets = malloc(nc * sizeof(cset)); in allocset()1254 p->g->sets = realloc(p->g->sets, nc * sizeof(cset)); in allocset()1261 p->g->sets[i].ptr = p->g->setbits + css*(i/CHAR_BIT); in allocset()1263 if (p->g->sets != NULL && p->g->setbits != NULL) in allocset()1275 cs = &p->g->sets[no]; in allocset()1301 top = &p->g->sets[p->g->ncsets]; in freeset()1335 top = &p->g->sets[p->g->ncsets]; in freezeset()1339 for (cs2 = &p->g->sets[0]; cs2 < top; cs2++) in freezeset()[all …]
604 cs = &m->g->sets[OPND(s)]; in backref()1017 cs = &g->sets[OPND(s)]; in step()
25 unsigned short sets; member
10 - support for x86, ARM and ARM thumb CPU instruction sets and kernel interfaces
24 Bionic currently supports the ARM and x86 instruction sets. In theory, it