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Searched refs:ALU_Opcode (Results 1 – 6 of 6) sorted by relevance

/dalvik/vm/compiler/codegen/x86/
DLower.h630 void fpu_VR(ALU_Opcode opc, OpndSize size, int vA);
688 void alu_unary_reg(OpndSize size, ALU_Opcode opc, int reg, bool isPhysical);
689 void alu_unary_mem(LowOp* op, OpndSize size, ALU_Opcode opc, int disp, int base_reg, bool isBasePhy…
691 void alu_binary_imm_mem(OpndSize size, ALU_Opcode opc,
693 void alu_binary_imm_reg(OpndSize size, ALU_Opcode opc, int imm, int reg, bool isPhysical);
694 void alu_binary_mem_reg(OpndSize size, ALU_Opcode opc,
697 void alu_binary_VR_reg(OpndSize size, ALU_Opcode opc, int vA, int reg, bool isPhysical);
698 void alu_sd_binary_VR_reg(ALU_Opcode opc, int vA, int reg, bool isPhysical, bool isSD);
699 void alu_binary_reg_reg(OpndSize size, ALU_Opcode opc,
702 void alu_binary_reg_mem(OpndSize size, ALU_Opcode opc,
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DLowerAlu.cpp410 int common_alu_int(ALU_Opcode opc, u2 vA, u2 v1, u2 v2) { //except div and rem in common_alu_int()
424 int common_shift_int(ALU_Opcode opc, u2 vA, u2 v1, u2 v2) { in common_shift_int()
749 int common_alu_int_lit(ALU_Opcode opc, u2 vA, u2 vB, s2 imm) { //except div and rem in common_alu_int_lit()
756 int common_shift_int_lit(ALU_Opcode opc, u2 vA, u2 vB, s2 imm) { in common_shift_int_lit()
772 int alu_rsub_int(ALU_Opcode opc, u2 vA, s2 imm, u2 vB) { in alu_rsub_int()
1115 int common_alu_long(ALU_Opcode opc, u2 vA, u2 v1, u2 v2) { //except div and rem in common_alu_long()
1494 int common_alu_float(ALU_Opcode opc, u2 vA, u2 v1, u2 v2) {//add, sub, mul in common_alu_float()
1605 int common_alu_double(ALU_Opcode opc, u2 vA, u2 v1, u2 v2) {//add, sub, mul in common_alu_double()
DLowerHelper.cpp1047 void fpu_VR(ALU_Opcode opc, OpndSize size, int vA) { in fpu_VR()
1211 void alu_unary_reg(OpndSize size, ALU_Opcode opc, int reg, bool isPhysical) { in alu_unary_reg()
1222 void alu_unary_mem(LowOp* op, OpndSize size, ALU_Opcode opc, int disp, int base_reg, bool isBasePhy… in alu_unary_mem()
1233 void alu_binary_imm_mem(OpndSize size, ALU_Opcode opc, int imm, int disp, int base_reg, bool isBase… in alu_binary_imm_mem()
1244 void alu_binary_imm_reg(OpndSize size, ALU_Opcode opc, int imm, int reg, bool isPhysical) { in alu_binary_imm_reg()
1255 void alu_binary_mem_reg(OpndSize size, ALU_Opcode opc, in alu_binary_mem_reg()
1266 void alu_sd_binary_VR_reg(ALU_Opcode opc, int vA, int reg, bool isPhysical, bool isSD) { in alu_sd_binary_VR_reg()
1319 void alu_binary_VR_reg(OpndSize size, ALU_Opcode opc, int vA, int reg, bool isPhysical) { in alu_binary_VR_reg()
1368 void alu_binary_reg_reg(OpndSize size, ALU_Opcode opc, in alu_binary_reg_reg()
1381 void alu_binary_reg_mem(OpndSize size, ALU_Opcode opc, in alu_binary_reg_mem()
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/dalvik/vm/compiler/codegen/x86/libenc/
Dencoder.h118 typedef enum ALU_Opcode { enum
122 } ALU_Opcode; typedef
485 ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const RM_Opnd & rm, const Imm_Opnd…
486 ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const M_Opnd & m, const R_Opnd & r…
487 ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const R_Opnd & r, const RM_Opnd & …
Denc_wrapper.h81 typedef enum ALU_Opcode { enum
90 } ALU_Opcode; typedef
Dencoder.inl44 inline static Mnemonic map_alu(ALU_Opcode alu) {
186 ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const RM_Opnd & rm, const Imm_Opnd…
193 ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const M_Opnd & m, const R_Opnd & r…
200 ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const R_Opnd & r, const RM_Opnd & …