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Searched refs:OpndSize_32 (Results 1 – 23 of 23) sorted by relevance

/dalvik/vm/compiler/codegen/x86/
DLowerInvoke.cpp94 get_virtual_reg(vD, OpndSize_32, 5, false); in common_invoke_virtual_nohelper()
97 move_mem_to_reg(OpndSize_32, offObject_clazz, 5, false, 6, false); //clazz of "this" in common_invoke_virtual_nohelper()
98 move_mem_to_reg(OpndSize_32, offClassObject_vtable, 6, false, 7, false); //vtable in common_invoke_virtual_nohelper()
102 move_mem_to_reg(OpndSize_32, methodIndex*4, 7, false, PhysicalReg_ECX, true); in common_invoke_virtual_nohelper()
152 move_imm_to_reg(OpndSize_32, (int) calleeMethod, PhysicalReg_ECX, true); in common_invoke_super()
173 …move_mem_to_reg(OpndSize_32, offMethod_name, PhysicalReg_EAX, true, PhysicalReg_EDX, true); //meth… in invoke_super_nsm()
197 get_virtual_reg(vD, OpndSize_32, 5, false); in common_invoke_direct()
202 move_imm_to_reg(OpndSize_32, (int) calleeMethod, PhysicalReg_ECX, true); in common_invoke_direct()
239 move_imm_to_reg(OpndSize_32, (int) calleeMethod, PhysicalReg_ECX, true); in common_invoke_static()
283 get_virtual_reg(vD, OpndSize_32, 1, false); in common_invoke_interface()
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DLowerReturn.cpp50 move_reg_to_reg(OpndSize_32, PhysicalReg_FP, true, 10, false); in common_returnFromMethod()
51 …move_mem_to_reg(OpndSize_32, -sizeofStackSaveArea+offStackSaveArea_prevFrame, PhysicalReg_FP, true… in common_returnFromMethod()
53 …move_mem_to_reg(OpndSize_32, -sizeofStackSaveArea+offStackSaveArea_method, PhysicalReg_FP, true, 6… in common_returnFromMethod()
54 compare_imm_reg(OpndSize_32, 0, 6, false); in common_returnFromMethod()
58 move_reg_to_mem(OpndSize_32, 6, false, offsetof(Thread, interpSave.method), 2, false); in common_returnFromMethod()
60 move_mem_to_reg(OpndSize_32, offMethod_clazz, 6, false, 14, false); in common_returnFromMethod()
62 move_reg_to_mem(OpndSize_32, PhysicalReg_FP, true, offThread_curFrame, 3, false); in common_returnFromMethod()
64 move_mem_to_reg(OpndSize_32, offClassObject_pDvmDex, 14, false, 7, false); in common_returnFromMethod()
65 move_reg_to_mem(OpndSize_32, 7, false, offsetof(Thread, interpSave.methodClassDex), 2, false); in common_returnFromMethod()
67 compare_imm_mem(OpndSize_32, 0, offsetof(Thread, suspendCount), 2, false); /* suspendCount */ in common_returnFromMethod()
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DLowerObject.cpp36 get_virtual_reg(vA, OpndSize_32, 1, false); //object in check_cast_nohelper()
52 compare_imm_reg(OpndSize_32, 0, 1, false); in check_cast_nohelper()
67 move_mem_to_reg(OpndSize_32, tmp*4, 4, false, PhysicalReg_EAX, true); in check_cast_nohelper()
68 compare_imm_reg(OpndSize_32, 0, PhysicalReg_EAX, true); in check_cast_nohelper()
75 move_imm_to_reg(OpndSize_32, tmp, PhysicalReg_EAX, true); in check_cast_nohelper()
82 move_imm_to_reg(OpndSize_32, (int)classPtr, PhysicalReg_EAX, true); in check_cast_nohelper()
90 move_mem_to_reg(OpndSize_32, offObject_clazz, 1, false, 6, false); //object->clazz in check_cast_nohelper()
106 move_reg_to_mem(OpndSize_32, 6, false, 0, PhysicalReg_ESP, true); in check_cast_nohelper()
107 move_reg_to_mem(OpndSize_32, PhysicalReg_EAX, true, 4, PhysicalReg_ESP, true); //resolved class in check_cast_nohelper()
115 move_reg_to_reg(OpndSize_32, PhysicalReg_EAX, true, 3, false); in check_cast_nohelper()
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DLowerAlu.cpp35 get_virtual_reg(vB, OpndSize_32, 1, false); in op_neg_int()
36 alu_unary_reg(OpndSize_32, neg_opc, 1, false); in op_neg_int()
37 set_virtual_reg(vA, OpndSize_32, 1, false); in op_neg_int()
47 get_virtual_reg(vB, OpndSize_32, 1, false); in op_not_int()
48 alu_unary_reg(OpndSize_32, not_opc, 1, false); in op_not_int()
49 set_virtual_reg(vA, OpndSize_32, 1, false); in op_not_int()
87 get_virtual_reg(vB, OpndSize_32, 1, false); in op_neg_float()
88 alu_binary_imm_reg(OpndSize_32, add_opc, 0x80000000, 1, false); in op_neg_float()
89 set_virtual_reg(vA, OpndSize_32, 1, false); in op_neg_float()
115 get_virtual_reg(vB, OpndSize_32, PhysicalReg_EAX, true); in op_int_to_long()
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DLowerMove.cpp34 get_virtual_reg(vB, OpndSize_32, 1, false/*isPhysical*/); in op_move()
35 set_virtual_reg(vA, OpndSize_32, 1, false); in op_move()
46 get_virtual_reg(vB, OpndSize_32, 1, false); in op_move_from16()
47 set_virtual_reg(vA, OpndSize_32, 1, false); in op_move_from16()
58 get_virtual_reg(vB, OpndSize_32, 1, false); in op_move_16()
59 set_virtual_reg(vA, OpndSize_32, 1, false); in op_move_16()
108 get_return_value(OpndSize_32, 1, false); in op_move_result()
109 set_virtual_reg(vA, OpndSize_32, 1, false); in op_move_result()
141 move_mem_to_reg(OpndSize_32, offThread_exception, 2, false, 3, false); in op_move_exception()
142 move_imm_to_mem(OpndSize_32, 0, offThread_exception, 2, false); in op_move_exception()
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DLowerConst.cpp52 set_VR_to_imm(vA, OpndSize_32, (int) strPtr ); in const_string_common_nohelper()
70 set_VR_to_imm(vA, OpndSize_32, tmp); in op_const_4()
80 set_VR_to_imm(vA, OpndSize_32, (s2)BBBB); in op_const_16()
91 set_VR_to_imm(vA, OpndSize_32, (s4)tmp); in op_const()
101 set_VR_to_imm(vA, OpndSize_32, (s4)tmp<<16); //?? in op_const_high16()
111 set_VR_to_imm(vA, OpndSize_32, (s2)tmp); in op_const_wide_16()
112 set_VR_to_imm(vA+1, OpndSize_32, (s2)tmp>>31); in op_const_wide_16()
123 set_VR_to_imm(vA, OpndSize_32, (s4)tmp); in op_const_wide_32()
124 set_VR_to_imm(vA+1, OpndSize_32, (s4)tmp>>31); in op_const_wide_32()
135 set_VR_to_imm(vA, OpndSize_32, (s4)tmp); in op_const_wide()
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DLowerGetPut.cpp44 get_virtual_reg(vref, OpndSize_32, 1, false); //array in aget_common_nohelper()
45 get_virtual_reg(vindex, OpndSize_32, 2, false); //index in aget_common_nohelper()
67 … move_mem_disp_scale_to_reg(OpndSize_32, 1, false, offArrayObject_contents, 2, false, 4, 4, false); in aget_common_nohelper()
88 set_virtual_reg(vA, OpndSize_32, 4, false); in aget_common_nohelper()
195 get_virtual_reg(vref, OpndSize_32, 1, false); //array in aput_common_nohelper()
196 get_virtual_reg(vindex, OpndSize_32, 2, false); //index in aput_common_nohelper()
221 get_virtual_reg(vA, OpndSize_32, 4, false); in aput_common_nohelper()
224 … move_reg_to_mem_disp_scale(OpndSize_32, 4, false, 1, false, offArrayObject_contents, 2, false, 4); in aput_common_nohelper()
339 get_virtual_reg(vref, OpndSize_32, 1, false); //array in op_aput_object()
343 compare_imm_reg(OpndSize_32, 0, 1, false); in op_aput_object()
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DLowerJump.cpp264 item->size = OpndSize_32; in insertGlobalPCWorklist()
284 item->size = OpndSize_32; in insertChainingWorklist()
305 item->size = OpndSize_32; in insertGlobalDataWorklist()
326 item->size = OpndSize_32; in insertVMAPIWorklist()
422 return OpndSize_32; in estOpndSizeFromImm()
440 assert(size == OpndSize_32); in getJmpCallInstSize()
483 *immSize = OpndSize_32; in getRelativeOffset()
497 *immSize = OpndSize_32; in getRelativeOffset()
502 *immSize = OpndSize_32; in getRelativeOffset()
510 *immSize = OpndSize_32; in getRelativeOffset()
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DLowerHelper.cpp538 op->lop.opnd1.size = OpndSize_32; in dump_movez_reg_reg()
798 dump_mem_reg(m, ATOM_NORMAL, OpndSize_32, disp, base_reg, isBasePhysical, in load_effective_addr()
808 dump_mem_scale_reg(m, OpndSize_32, in load_effective_addr_scale()
831 assert(srcSize == OpndSize_32 && dstSize == OpndSize_64); in convert_integer()
833 …dump_reg_reg(m, ATOM_NORMAL, OpndSize_32, PhysicalReg_EAX, true, PhysicalReg_EDX, true, LowOpndReg… in convert_integer()
895 size = OpndSize_32; in compare_VR_reg_all()
907 dumpImmToMem(vA, OpndSize_32, tmpValue[0]); in compare_VR_reg_all()
923 dumpImmToMem(vA, OpndSize_32, tmpValue[0]); in compare_VR_reg_all()
924 dumpImmToMem(vA+1, OpndSize_32, tmpValue[1]); in compare_VR_reg_all()
930 if(isConst == 1) dumpImmToMem(vA, OpndSize_32, tmpValue[0]); in compare_VR_reg_all()
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DNcgAot.cpp35 move_imm_to_mem(OpndSize_32, (int)rPC, in export_pc()
44 move_imm_to_reg(OpndSize_32, (int)funcPtr, C_SCRATCH_1, isScratchPhysical); in jumpToInterpNoChain()
55 move_imm_to_reg(OpndSize_32, (int)funcPtr, C_SCRATCH_1, isScratchPhysical); in jumpToInterpPunt()
73 move_imm_to_reg(OpndSize_32, (int)funcPtr, C_SCRATCH_1, isScratchPhysical); in jumpToExceptionThrown()
90 move_imm_to_reg(OpndSize_32, (int)funcPtr, C_SCRATCH_1, isScratchPhysical); in invokeInterpreter()
102 move_imm_to_reg(OpndSize_32, (int)funcPtr, C_SCRATCH_1, isScratchPhysical); in callFuncPtr()
DCodegenInterface.cpp614 unconditional_jump_int(0, OpndSize_32); in insertJumpHelp()
642 move_imm_to_reg(OpndSize_32, (int) (cUnit->method->insns + offset), P_GPR_1, true); in handleNormalChainingCell()
664 move_imm_to_reg(OpndSize_32, (int) (cUnit->method->insns + offset), P_GPR_1, true); in handleHotChainingCell()
683 move_imm_to_reg(OpndSize_32, (int) (cUnit->method->insns + offset), P_GPR_1, true); in handleBackwardBranchChainingCell()
702 move_imm_to_reg(OpndSize_32, (int) (callee->insns), P_GPR_1, true); in handleInvokeSingletonChainingCell()
785 get_virtual_reg(mir->dalvikInsn.vA, OpndSize_32, P_GPR_1, true); in genHoistedChecksForCountUpLoop()
787 get_virtual_reg(mir->dalvikInsn.vC, OpndSize_32, P_GPR_2, true); in genHoistedChecksForCountUpLoop()
789 compare_imm_reg(OpndSize_32, 0, P_GPR_1, true); in genHoistedChecksForCountUpLoop()
802 alu_binary_imm_reg(OpndSize_32, sub_opc, -delta, P_GPR_2, true); in genHoistedChecksForCountUpLoop()
804 alu_binary_imm_reg(OpndSize_32, add_opc, delta, P_GPR_2, true); in genHoistedChecksForCountUpLoop()
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DAnalysisO1.cpp95 return OpndSize_32; in getRegSize()
120 …if(getRegSize(tA) == OpndSize_64 && getRegSize(tB) == OpndSize_32 && regA == regB) return OVERLAP_… in getBPartiallyOverlapA()
121 …if(getRegSize(tA) == OpndSize_64 && getRegSize(tB) == OpndSize_32 && regB == regA + 1) return OVER… in getBPartiallyOverlapA()
122 …if(getRegSize(tA) == OpndSize_32 && getRegSize(tB) == OpndSize_64 && (regA == regB || regA == regB… in getBPartiallyOverlapA()
132 if(getRegSize(tA) == OpndSize_64 && getRegSize(tB) == OpndSize_32 && regA == regB) in getAPartiallyOverlapB()
134 if(getRegSize(tA) == OpndSize_64 && getRegSize(tB) == OpndSize_32 && regB == regA+1) in getAPartiallyOverlapB()
140 if(getRegSize(tA) == OpndSize_32 && getRegSize(tB) == OpndSize_64 && regA == regB) in getAPartiallyOverlapB()
142 if(getRegSize(tA) == OpndSize_32 && getRegSize(tB) == OpndSize_64 && regA == regB+1) in getAPartiallyOverlapB()
150 if(getRegSize(tB) == OpndSize_32) return true; in isAFullyCoverB()
603 …move_imm_to_mem(OpndSize_32, cUnit->startOffset, -4, PhysicalReg_ESP, true); //2nd argument: offset in startOfTraceO1()
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DBytecodeVisitor.cpp523 setVRToNonConst(constWorklist[k], OpndSize_32); in updateConstInfo()
563 setVRToConst(vA, OpndSize_32, tmpValue); in getConstInfo()
751 setVRToConst(vA, OpndSize_32, tmpValue); in getConstInfo()
827 setVRToConst(vA, OpndSize_32, tmpValue); in getConstInfo()
869 setVRToConst(vA, OpndSize_32, tmpValue); in getConstInfo()
921 setVRToConst(vA, OpndSize_32, tmpValue); in getConstInfo()
973 setVRToConst(vA, OpndSize_32, tmpValue); in getConstInfo()
1034 setVRToConst(vA, OpndSize_32, tmpValue); in getConstInfo()
1047 setVRToConst(vA, OpndSize_32, tmpValue); in getConstInfo()
1061 setVRToConst(vA, OpndSize_32, tmpValue); in getConstInfo()
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DLower.cpp356 move_mem_to_reg(OpndSize_32, 0, PhysicalReg_ESP, true, PhysicalReg_EDX, true); in initGlobalMethods()
/dalvik/vm/compiler/codegen/x86/libenc/
Denc_prvt.h141 #define EAX {OpndKind_GPReg, OpndSize_32, OpndExt_Any, RegName_EAX}
147 #define ECX {OpndKind_GPReg, OpndSize_32, OpndExt_Any, RegName_ECX}
153 #define EDX {OpndKind_GPReg, OpndSize_32, OpndExt_Any, RegName_EDX}
158 #define ESI {OpndKind_GPReg, OpndSize_32, OpndExt_Any, RegName_ESI}
163 #define EDI {OpndKind_GPReg, OpndSize_32, OpndExt_Any, RegName_EDI}
170 #define r32 {OpndKind_GPReg, OpndSize_32, OpndExt_Any, RegName_Null}
177 #define r_m32 {(OpndKind)(OpndKind_GPReg|OpndKind_Mem), OpndSize_32, OpndExt_Any, RegName_Nul…
181 #define r_m32s {(OpndKind)(OpndKind_GPReg|OpndKind_Mem), OpndSize_32, OpndExt_Signed, RegName…
185 #define r_m32u {(OpndKind)(OpndKind_GPReg|OpndKind_Mem), OpndSize_32, OpndExt_Zero, RegName_N…
192 #define m32 {OpndKind_Mem, OpndSize_32, OpndExt_Any, RegName_Null}
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Denc_defs.h187 RegName_EAX=REGNAME(OpndKind_GPReg,OpndSize_32,0),
188 RegName_ECX=REGNAME(OpndKind_GPReg,OpndSize_32,1),
189 RegName_EDX=REGNAME(OpndKind_GPReg,OpndSize_32,2),
190 RegName_EBX=REGNAME(OpndKind_GPReg,OpndSize_32,3),
191 RegName_ESP=REGNAME(OpndKind_GPReg,OpndSize_32,4),
192 RegName_EBP=REGNAME(OpndKind_GPReg,OpndSize_32,5),
193 RegName_ESI=REGNAME(OpndKind_GPReg,OpndSize_32,6),
194 RegName_EDI=REGNAME(OpndKind_GPReg,OpndSize_32,7),
197 RegName_R8D = REGNAME(OpndKind_GPReg,OpndSize_32,8),
198 RegName_R9D = REGNAME(OpndKind_GPReg,OpndSize_32,9),
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Ddec_base.cpp262 opnd_size = OpndSize_32; in decode_aux()
266 opnd_size = OpndSize_32; // so there is no compiler warning in decode_aux()
492 …index = getRegName(OpndKind_GPReg, OpndSize_32, EXTEND_REG(sib.index, x)); //Android x86: OpndDesc… in decodeModRM()
499 …base = getRegName(OpndKind_GPReg, OpndSize_32, EXTEND_REG(sib.base, b)); //Android x86: OpndDesc.s… in decodeModRM()
506 …base = getRegName(OpndKind_GPReg, OpndSize_32, EXTEND_REG(modrm.rm, b)); //Android x86: OpndDesc.s… in decodeModRM()
Denc_wrapper.cpp89 if(opnd.size() != OpndSize_32) { in printOperand()
303 add_r(args, reg, OpndSize_32); in encoder_movzs_mem_disp_scale_reg()
451 add_r(args, reg, OpndSize_32); in encoder_movez_mem_to_reg()
465 add_r(args, reg, OpndSize_32); in encoder_moves_mem_to_reg()
479 add_r(args, reg2, OpndSize_32); //destination in encoder_movez_reg_to_reg()
493 add_r(args, reg2, OpndSize_32); //destination in encoder_moves_reg_to_reg()
509 if(opnd.size() != OpndSize_32) { in DisassembleOperandToBuf()
Dencoder.cpp120 OpndSize_8, OpndSize_16, OpndSize_32, OpndSize_64, OpndSize_Any
Denc_defs_ext.h43 OpndSize_32 = 0x04, enumerator
Denc_base.h350 m_kind(OpndKind_Imm), m_size(OpndSize_32), m_ext(ext), m_imm64(ival) in m_kind()
Denc_base.cpp882 { "Sz32", OpndSize_32 },
Denc_tabl.cpp1884 else if (sz==OpndSize_32) {imm_encode = id; coff_encode=cd; } in buildMnemonicDesc()