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Searched refs:isLoad (Results 1 – 3 of 3) sorted by relevance

/dalvik/vm/compiler/codegen/mips/
DGlobalOptimizations.cpp254 int isLoad; in delaySlotLIR() local
285 isLoad = EncodingMap[thisLIR->opcode].flags & IS_LOAD; in delaySlotLIR()
291 !(isLoad && storeVisited) && in delaySlotLIR()
299 loadVisited |= isLoad; in delaySlotLIR()
346 int isLoad = flags & IS_LOAD; in delaySlotLIR() local
349 if (isLoad && nextLIR->opcode == targetLIR->opcode && in delaySlotLIR()
361 if (isLoad || isStore) { in delaySlotLIR()
363 newLIR->operands[0] = isLoad ? 0 : 1; in delaySlotLIR()
DCodegenCommon.cpp35 static void setMemRefType(MipsLIR *lir, bool isLoad, int memType) in setMemRefType() argument
42 if (isLoad) { in setMemRefType()
52 assert(isLoad); in setMemRefType()
77 static void annotateDalvikRegAccess(MipsLIR *lir, int regId, bool isLoad) in annotateDalvikRegAccess() argument
80 setMemRefType(lir, isLoad, kDalvikReg); in annotateDalvikRegAccess()
/dalvik/vm/compiler/codegen/arm/
DCodegenCommon.cpp35 static void setMemRefType(ArmLIR *lir, bool isLoad, int memType) in setMemRefType() argument
40 if (isLoad) { in setMemRefType()
50 assert(isLoad); in setMemRefType()
75 static void annotateDalvikRegAccess(ArmLIR *lir, int regId, bool isLoad) in annotateDalvikRegAccess() argument
77 setMemRefType(lir, isLoad, kDalvikReg); in annotateDalvikRegAccess()