offThread_inJitCodeCache (reference) in projects: dalvik

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Searched refs:offThread_inJitCodeCache (Results 1 – 25 of 27) sorted by relevance

/dalvik/vm/compiler/template/mips/
D	TEMPLATE_MONITOR_ENTER_DEBUG.S	`14 sw zero, offThread_inJitCodeCache(a0) # record that we're not returning`
D	TEMPLATE_MONITOR_ENTER.S	`14 sw zero, offThread_inJitCodeCache(a0) # record that we're not returning`
D	footer.S	`13 sw zero, offThread_inJitCodeCache(rSELF) # not in jit code cache 75 sw a2, offThread_inJitCodeCache(rSELF) # set the mode properly 103 sw zero, offThread_inJitCodeCache(rSELF) # in interpreter land`
D	TEMPLATE_INVOKE_METHOD_NATIVE.S	`35 sw zero, offThread_inJitCodeCache(rSELF) # not in the jit code cache 91 sw a2, offThread_inJitCodeCache(rSELF) # set the mode properly`
/dalvik/vm/compiler/template/armv5te/
D	footer.S	`14 str r2, [rSELF, #offThread_inJitCodeCache] @ not in jit code cache 61 str r2, [rSELF, #offThread_inJitCodeCache] @ set the new mode 84 str r2, [rSELF, #offThread_inJitCodeCache] @ in interpreter land`
D	TEMPLATE_INVOKE_METHOD_NATIVE.S	`31 str r2, [rSELF, #offThread_inJitCodeCache] @ not in the jit code cache 73 str r2, [rSELF, #offThread_inJitCodeCache] @ set the mode properly`
/dalvik/vm/mterp/mips/
D	entry.S	`59 sw zero, offThread_inJitCodeCache(rSELF)`
D	footer.S	31 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land 47 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land 61 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land 75 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land 117 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land 162 sw a0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag 181 sw v0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag 230 sw a0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag 254 sw a0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag 282 sw a0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag [all …]
/dalvik/vm/mterp/armv5te/
D	entry.S	`71 str r1, [rSELF, #offThread_inJitCodeCache] @ back to the interp land`
D	footer.S	33 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 52 str r3, [rSELF, #offThread_inJitCodeCache] @ back to the interp land 68 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 84 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 126 str r0, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 172 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 192 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 239 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 262 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 285 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag [all …]
/dalvik/vm/mterp/x86/
D	entry.S	`56 movl $$0, offThread_inJitCodeCache(%ecx)`
D	footer.S	`45 movl $$0, offThread_inJitCodeCache(%ecx) 88 movl %eax,offThread_inJitCodeCache(%ecx) # set inJitCodeCache flag 118 movl %eax,offThread_inJitCodeCache(%ecx) # set inJitCodeCache flag 668 movl %ecx, offThread_inJitCodeCache(%eax)`
/dalvik/vm/compiler/codegen/x86/
D	LowerReturn.cpp	`74 move_reg_to_mem(OpndSize_32, PhysicalReg_EBX, true, offThread_inJitCodeCache, 3, false); in common_returnFromMethod()`
D	LowerInvoke.cpp	`871 …move_imm_to_mem(OpndSize_32, 0, offThread_inJitCodeCache, P_SCRATCH_1, true); //clear self->inJitC… in generate_invokeNative() 899 move_reg_to_mem(OpndSize_32, P_SCRATCH_2, true, offThread_inJitCodeCache, P_GPR_1, true); in generate_invokeNative()`
D	Lower.h	`137 #define offThread_inJitCodeCache 124 macro`
/dalvik/vm/compiler/template/out/
D	CompilerTemplateAsm-armv5te.S	440 str r2, [rSELF, #offThread_inJitCodeCache] @ not in the jit code cache 482 str r2, [rSELF, #offThread_inJitCodeCache] @ set the mode properly 1176 str r3, [r0, #offThread_inJitCodeCache] 1525 str r2, [rSELF, #offThread_inJitCodeCache] @ not in the jit code cache 1567 str r2, [rSELF, #offThread_inJitCodeCache] @ set the mode properly 1596 str r2, [rSELF, #offThread_inJitCodeCache] @ not in jit code cache 1643 str r2, [rSELF, #offThread_inJitCodeCache] @ set the new mode 1666 str r2, [rSELF, #offThread_inJitCodeCache] @ in interpreter land
D	CompilerTemplateAsm-armv7-a-neon.S	440 str r2, [rSELF, #offThread_inJitCodeCache] @ not in the jit code cache 482 str r2, [rSELF, #offThread_inJitCodeCache] @ set the mode properly 1445 str r3, [r0, #offThread_inJitCodeCache] 1794 str r2, [rSELF, #offThread_inJitCodeCache] @ not in the jit code cache 1836 str r2, [rSELF, #offThread_inJitCodeCache] @ set the mode properly 1865 str r2, [rSELF, #offThread_inJitCodeCache] @ not in jit code cache 1912 str r2, [rSELF, #offThread_inJitCodeCache] @ set the new mode 1935 str r2, [rSELF, #offThread_inJitCodeCache] @ in interpreter land
D	CompilerTemplateAsm-armv5te-vfp.S	440 str r2, [rSELF, #offThread_inJitCodeCache] @ not in the jit code cache 482 str r2, [rSELF, #offThread_inJitCodeCache] @ set the mode properly 1445 str r3, [r0, #offThread_inJitCodeCache] 1794 str r2, [rSELF, #offThread_inJitCodeCache] @ not in the jit code cache 1836 str r2, [rSELF, #offThread_inJitCodeCache] @ set the mode properly 1865 str r2, [rSELF, #offThread_inJitCodeCache] @ not in jit code cache 1912 str r2, [rSELF, #offThread_inJitCodeCache] @ set the new mode 1935 str r2, [rSELF, #offThread_inJitCodeCache] @ in interpreter land
D	CompilerTemplateAsm-armv7-a.S	440 str r2, [rSELF, #offThread_inJitCodeCache] @ not in the jit code cache 482 str r2, [rSELF, #offThread_inJitCodeCache] @ set the mode properly 1445 str r3, [r0, #offThread_inJitCodeCache] 1794 str r2, [rSELF, #offThread_inJitCodeCache] @ not in the jit code cache 1836 str r2, [rSELF, #offThread_inJitCodeCache] @ set the mode properly 1865 str r2, [rSELF, #offThread_inJitCodeCache] @ not in jit code cache 1912 str r2, [rSELF, #offThread_inJitCodeCache] @ set the new mode 1935 str r2, [rSELF, #offThread_inJitCodeCache] @ in interpreter land
/dalvik/vm/mterp/common/
D	asm-constants.h	`186 MTERP_OFFSET(offThread_inJitCodeCache, Thread, inJitCodeCache, 124)`
/dalvik/vm/mterp/out/
D	InterpAsm-armv7-a.S	309 str r1, [rSELF, #offThread_inJitCodeCache] @ back to the interp land 15614 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 15633 str r3, [rSELF, #offThread_inJitCodeCache] @ back to the interp land 15649 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 15665 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 15707 str r0, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 15753 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 15773 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 15820 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 15843 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag [all …]
D	InterpAsm-armv5te-vfp.S	295 str r1, [rSELF, #offThread_inJitCodeCache] @ back to the interp land 15677 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 15696 str r3, [rSELF, #offThread_inJitCodeCache] @ back to the interp land 15712 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 15728 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 15770 str r0, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 15816 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 15836 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 15883 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 15906 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag [all …]
D	InterpAsm-armv7-a-neon.S	309 str r1, [rSELF, #offThread_inJitCodeCache] @ back to the interp land 15614 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 15633 str r3, [rSELF, #offThread_inJitCodeCache] @ back to the interp land 15649 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 15665 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 15707 str r0, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 15753 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 15773 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 15820 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 15843 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag [all …]
D	InterpAsm-armv5te.S	295 str r1, [rSELF, #offThread_inJitCodeCache] @ back to the interp land 16135 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 16154 str r3, [rSELF, #offThread_inJitCodeCache] @ back to the interp land 16170 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 16186 str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 16228 str r0, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land 16274 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 16294 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 16341 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag 16364 str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag [all …]
D	InterpAsm-mips.S	447 sw zero, offThread_inJitCodeCache(rSELF) 11037 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land 11053 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land 11067 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land 11081 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land 11123 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land 11168 sw a0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag 11187 sw v0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag 11236 sw a0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag 11260 sw a0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag [all …]

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