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Searched refs:opc (Results 1 – 10 of 10) sorted by relevance

/dalvik/dexopt/
DOptMain.cpp133 const char* opc; in extractAndProcessZip() local
136 opc = strstr(dexoptFlagStr, "v="); /* verification */ in extractAndProcessZip()
137 if (opc != NULL) { in extractAndProcessZip()
138 switch (*(opc+2)) { in extractAndProcessZip()
146 opc = strstr(dexoptFlagStr, "o="); /* optimization */ in extractAndProcessZip()
147 if (opc != NULL) { in extractAndProcessZip()
148 switch (*(opc+2)) { in extractAndProcessZip()
157 opc = strstr(dexoptFlagStr, "m=y"); /* register map */ in extractAndProcessZip()
158 if (opc != NULL) { in extractAndProcessZip()
162 opc = strstr(dexoptFlagStr, "u="); /* uniprocessor target */ in extractAndProcessZip()
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/dalvik/vm/compiler/codegen/mips/Mips32/
DFactory.cpp171 static MipsLIR *opCompareBranch(CompilationUnit *cUnit, MipsOpCode opc, int rs, int rt) in opCompareBranch() argument
175 assert(opc >= kMipsBeqz && opc <= kMipsBnez); in opCompareBranch()
176 res = newLIR1(cUnit, opc, rs); in opCompareBranch()
178 assert(opc == kMipsBeq || opc == kMipsBne); in opCompareBranch()
179 res = newLIR2(cUnit, opc, rs, rt); in opCompareBranch()
914 MipsOpCode opc = kMipsNop; in genRegImmCheck() local
916 opc = kMipsBeqz; in genRegImmCheck()
918 opc = kMipsBnez; in genRegImmCheck()
920 opc = kMipsBltz; in genRegImmCheck()
922 opc = kMipsBlez; in genRegImmCheck()
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DGen.cpp120 static void withCarryHelper(CompilationUnit *cUnit, MipsOpCode opc, in withCarryHelper() argument
125 newLIR3(cUnit, opc, rlDest.lowReg, rlSrc1.lowReg, rlSrc2.lowReg); in withCarryHelper()
127 newLIR3(cUnit, opc, rlDest.highReg, rlSrc1.highReg, rlSrc2.highReg); in withCarryHelper()
128 newLIR3(cUnit, opc, rlDest.highReg, rlDest.highReg, tReg); in withCarryHelper()
/dalvik/vm/compiler/codegen/x86/
DLowerHelper.cpp1047 void fpu_VR(ALU_Opcode opc, OpndSize size, int vA) { in fpu_VR() argument
1048 Mnemonic m = map_of_fpu_opcode_2_mnemonic[opc]; in fpu_VR()
1211 void alu_unary_reg(OpndSize size, ALU_Opcode opc, int reg, bool isPhysical) { in alu_unary_reg() argument
1214 m = map_of_64_opcode_2_mnemonic[opc]; in alu_unary_reg()
1216 m = map_of_alu_opcode_2_mnemonic[opc]; in alu_unary_reg()
1222 void alu_unary_mem(LowOp* op, OpndSize size, ALU_Opcode opc, int disp, int base_reg, bool isBasePhy… in alu_unary_mem() argument
1225 m = map_of_64_opcode_2_mnemonic[opc]; in alu_unary_mem()
1227 m = map_of_alu_opcode_2_mnemonic[opc]; in alu_unary_mem()
1233 void alu_binary_imm_mem(OpndSize size, ALU_Opcode opc, int imm, int disp, int base_reg, bool isBase… in alu_binary_imm_mem() argument
1236 m = map_of_64_opcode_2_mnemonic[opc]; in alu_binary_imm_mem()
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DLower.h630 void fpu_VR(ALU_Opcode opc, OpndSize size, int vA);
688 void alu_unary_reg(OpndSize size, ALU_Opcode opc, int reg, bool isPhysical);
689 void alu_unary_mem(LowOp* op, OpndSize size, ALU_Opcode opc, int disp, int base_reg, bool isBasePhy…
691 void alu_binary_imm_mem(OpndSize size, ALU_Opcode opc,
693 void alu_binary_imm_reg(OpndSize size, ALU_Opcode opc, int imm, int reg, bool isPhysical);
694 void alu_binary_mem_reg(OpndSize size, ALU_Opcode opc,
697 void alu_binary_VR_reg(OpndSize size, ALU_Opcode opc, int vA, int reg, bool isPhysical);
698 void alu_sd_binary_VR_reg(ALU_Opcode opc, int vA, int reg, bool isPhysical, bool isSD);
699 void alu_binary_reg_reg(OpndSize size, ALU_Opcode opc,
702 void alu_binary_reg_mem(OpndSize size, ALU_Opcode opc,
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DLowerAlu.cpp410 int common_alu_int(ALU_Opcode opc, u2 vA, u2 v1, u2 v2) { //except div and rem in common_alu_int() argument
415 alu_binary_VR_reg(OpndSize_32, opc, v2, 1, false); in common_alu_int()
424 int common_shift_int(ALU_Opcode opc, u2 vA, u2 v1, u2 v2) { in common_shift_int() argument
430 alu_binary_reg_reg(OpndSize_32, opc, PhysicalReg_ECX, true, 1, false); in common_shift_int()
749 int common_alu_int_lit(ALU_Opcode opc, u2 vA, u2 vB, s2 imm) { //except div and rem in common_alu_int_lit() argument
751 alu_binary_imm_reg(OpndSize_32, opc, imm, 1, false); in common_alu_int_lit()
756 int common_shift_int_lit(ALU_Opcode opc, u2 vA, u2 vB, s2 imm) { in common_shift_int_lit() argument
757 return common_alu_int_lit(opc, vA, vB, imm); in common_shift_int_lit()
772 int alu_rsub_int(ALU_Opcode opc, u2 vA, s2 imm, u2 vB) { in alu_rsub_int() argument
775 alu_binary_reg_reg(OpndSize_32, opc, 1, false, 2, false); in alu_rsub_int()
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/dalvik/vm/compiler/codegen/x86/libenc/
Dencoder.h485 ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const RM_Opnd & rm, const Imm_Opnd…
486 ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const M_Opnd & m, const R_Opnd & r…
487 ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const R_Opnd & r, const RM_Opnd & …
494 ENCODER_DECLARE_EXPORT char * shift(char * stream, Shift_Opcode opc, const RM_Opnd & rm, const Imm_…
495 ENCODER_DECLARE_EXPORT char * shift(char * stream, Shift_Opcode opc, const RM_Opnd & rm, Opnd_Size …
496 ENCODER_DECLARE_EXPORT char * shift(char * stream, Shift_Opcode opc, const RM_Opnd & rm, const R_Op…
497 ENCODER_DECLARE_EXPORT char * shift(char * stream, Shift_Opcode opc, const RM_Opnd & rm, const R_Op…
Dencoder.inl186 ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const RM_Opnd & rm, const Imm_Opnd… argument
190 return (char*)EncoderBase::encode(stream, map_alu(opc), args);
193 ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const M_Opnd & m, const R_Opnd & r… argument
197 return (char*)EncoderBase::encode(stream, map_alu(opc), args);
200 ENCODER_DECLARE_EXPORT char * alu(char * stream, ALU_Opcode opc, const R_Opnd & r, const RM_Opnd & … argument
204 return (char*)EncoderBase::encode(stream, map_alu(opc), args);
/dalvik/vm/compiler/codegen/mips/
DCodegenDriver.cpp350 MipsOpCode opc, int rs, int rt, in genConditionalBranchMips() argument
353 MipsLIR *branch = opCompareBranch(cUnit, opc, rs, rt); in genConditionalBranchMips()
830 MipsOpCode opc; in genArithOpInt() local
858 opc = kMipsMflo; in genArithOpInt()
865 opc = kMipsMfhi; in genArithOpInt()
913 newLIR2(cUnit, opc, rlResult.lowReg, divReg); in genArithOpInt()
2150 MipsOpCode opc = kMipsNop; in handleFmt21t() local
2165 opc = kMipsBeqz; in handleFmt21t()
2168 opc = kMipsBne; in handleFmt21t()
2172 opc = kMipsBltz; in handleFmt21t()
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/dalvik/vm/analysis/
DOptimize.cpp163 Opcode opc, quickOpc, volatileOpc; in optimizeMethod() local
167 opc = dexOpcodeFromCodeUnit(*insns); in optimizeMethod()
200 switch (opc) { in optimizeMethod()
302 switch (opc) { in optimizeMethod()