| /dalvik/vm/compiler/codegen/x86/libenc/ |
| D | enc_wrapper.cpp | 58 inline void add_m_scale(EncoderBase::Operands & args, int baseReg, int indexReg, int scale, in add_m_scale() argument
62 map_of_regno_2_regname[indexReg], scale, in add_m_scale()
65 …void add_m_disp_scale(EncoderBase::Operands & args, int baseReg, int disp, int indexReg, int scale, in add_m_disp_scale() argument
69 map_of_regno_2_regname[indexReg], scale, in add_m_disp_scale()
94 if(opnd.scale() != 0) { in printOperand()
98 getRegNameString(opnd.index()), opnd.scale()); in printOperand()
257 … int base_reg, bool isBasePhysical, int index_reg, bool isIndexPhysical, int scale, in encoder_mem_scale_reg() argument
261 add_m_scale(args, base_reg, index_reg, scale, size); in encoder_mem_scale_reg()
272 … int base_reg, bool isBasePhysical, int index_reg, bool isIndexPhysical, int scale, in encoder_reg_mem_scale() argument
275 add_m_scale(args, base_reg, index_reg, scale, size); in encoder_reg_mem_scale()
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| D | enc_base.cpp | 418 assert(original.scale() == decoded.scale()); in encode()
479 assert(op.scale() == 0); // 'scale!=0' has no meaning without index in encodeModRM()
489 sib.scale = 0; // in encodeModRM()
508 assert(op.scale() == 0); // 'scale!=0' has no meaning without index in encodeModRM()
560 unsigned sc = op.scale(); in encodeModRM()
561 if (sc == 1 || sc==0) { sib.scale = 0; } // SS=00 in encodeModRM()
562 else if (sc == 2) { sib.scale = 1; } // SS=01 in encodeModRM()
563 else if (sc == 4) { sib.scale = 2; } // SS=10 in encodeModRM()
564 else if (sc == 8) { sib.scale = 3; } // SS=11 in encodeModRM()
590 assert(op.scale() == 0); // 'scale!=0' has no meaning without index in encodeModRM()
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| D | enc_wrapper.h | 191 … int base_reg, bool isBasePhysical, int index_reg, bool isIndexPhysical, int scale,
195 … int base_reg, bool isBasePhysical, int index_reg, bool isIndexPhysical, int scale,
198 … int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale,
201 … int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale,
205 … int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale,
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| D | dec_base.cpp | 469 unsigned scale = 0; in decodeModRM() local
490 scale = (1<<sib.scale); in decodeModRM()
537 opnd = EncoderBase::Operand(opndDesc.size, base, index, scale, disp); in decodeModRM()
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| D | enc_base.h | 375 Operand(OpndSize size, RegName base, RegName index, unsigned scale,
380 m_scale = scale; in m_kind()
468 unsigned scale(void) const { return is_mem() ? m_scale : 0; } in scale() function
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| D | encoder.h | 349 M_Opnd(I_32 disp, Reg_No rbase, Reg_No rindex, unsigned scale): in M_Opnd() argument
350 RM_Opnd(Mem), m_disp(disp), m_scale(scale), m_index(rindex), m_base(rbase) {} in M_Opnd()
358 inline const Imm_Opnd & scale(void) const { return m_scale; } in scale() function
382 M_Index_Opnd(Reg_No base, Reg_No index, I_32 disp, unsigned scale): in M_Index_Opnd() argument
383 M_Opnd(disp, base, index, scale) {} in M_Index_Opnd()
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| D | enc_prvt.h | 270 unsigned char scale:2; member
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| D | encoder.inl | 77 (unsigned)m.scale().get_value(), (int)m.disp().get_value(), ext));
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| /dalvik/vm/compiler/codegen/x86/ |
| D | LowerHelper.cpp | 137 …e(LowOpndMem* mem, int base, bool isPhysical, int disp, int index, bool indexPhysical, int scale) { in set_mem_opnd_scale() argument
153 mem->m_scale.value = scale; in set_mem_opnd_scale()
566 int scale, int reg, LowOpndRegType type) { in lower_mem_scale_reg() argument
570 scale, reg, true, type, stream); in lower_mem_scale_reg()
574 scale, reg, true, type, stream); in lower_mem_scale_reg()
577 scale, reg, true, type, stream); in lower_mem_scale_reg()
583 … int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale, in dump_mem_scale_reg() argument
600 return lower_mem_scale_reg(m, size, baseAll, disp, indexAll, scale, regAll, type); in dump_mem_scale_reg()
603 isIndexPhysical, scale, reg, isPhysical, type, stream); in dump_mem_scale_reg()
611 int base_reg, int disp, int index_reg, int scale, LowOpndRegType type) { in lower_reg_mem_scale() argument
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| D | Lower.h | 613 int index_reg, bool isIndexPhysical, int scale,
733 int disp, int index_reg, bool isIndexPhysical, int scale,
737 int disp, int index_reg, bool isIndexPhysical, int scale,
746 … int base_reg, bool isBasePhysical, int index_reg, bool isIndexPhysical, int scale,
749 … int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale,
753 … int base_reg, bool isBasePhysical, int index_reg, bool isIndexPhysical, int scale);
756 … int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale);
1141 …le(LowOpndMem* mem, int base, bool isPhysical, int disp, int index, bool indexPhysical, int scale);
1173 … int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale,
1177 … int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale,
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| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| D | Factory.cpp | 714 int rIndex, int rDest, int scale, OpSize size) in loadBaseIndexed() argument
719 bool thumbForm = (allLowRegs && (scale == 0)); in loadBaseIndexed()
735 if (scale) { in loadBaseIndexed()
737 encodeShift(kArmLsl, scale)); in loadBaseIndexed()
768 load = newLIR4(cUnit, opcode, rDest, rBase, rIndex, scale); in loadBaseIndexed()
778 int rIndex, int rSrc, int scale, OpSize size) in storeBaseIndexed() argument
783 bool thumbForm = (allLowRegs && (scale == 0)); in storeBaseIndexed()
799 if (scale) { in storeBaseIndexed()
801 encodeShift(kArmLsl, scale)); in storeBaseIndexed()
828 store = newLIR4(cUnit, opcode, rSrc, rBase, rIndex, scale); in storeBaseIndexed()
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| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| D | Factory.cpp | 470 int rIndex, int rDest, int scale, OpSize size) in loadBaseIndexed() argument
476 if (scale) { in loadBaseIndexed()
479 first = opRegRegImm(cUnit, kOpLsl, rNewIndex, rIndex, scale); in loadBaseIndexed()
506 if (scale) in loadBaseIndexed()
513 int rIndex, int rSrc, int scale, OpSize size) in storeBaseIndexed() argument
519 if (scale) { in storeBaseIndexed()
521 first = opRegRegImm(cUnit, kOpLsl, rNewIndex, rIndex, scale); in storeBaseIndexed()
544 if (scale) in storeBaseIndexed()
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| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| D | Factory.cpp | 422 int rIndex, int rDest, int scale, OpSize size) in loadBaseIndexed() argument
440 if (!scale) { in loadBaseIndexed()
443 first = opRegRegImm(cUnit, kOpLsl, tReg, rIndex, scale); in loadBaseIndexed()
484 int rIndex, int rSrc, int scale, OpSize size) in storeBaseIndexed() argument
503 if (!scale) { in storeBaseIndexed()
506 first = opRegRegImm(cUnit, kOpLsl, tReg, rIndex, scale); in storeBaseIndexed()
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| /dalvik/vm/compiler/codegen/arm/ |
| D | CodegenDriver.cpp | 407 RegLocation rlDest, int scale) in genArrayGet() argument
441 if (scale) { in genArrayGet()
443 opRegRegImm(cUnit, kOpLsl, rNewIndex, rlIndex.lowReg, scale); in genArrayGet()
462 scale, size); in genArrayGet()
476 RegLocation rlSrc, int scale) in genArrayPut() argument
519 if (scale) { in genArrayPut()
521 opRegRegImm(cUnit, kOpLsl, rNewIndex, rlIndex.lowReg, scale); in genArrayPut()
539 scale, size); in genArrayPut()
551 RegLocation rlSrc, int scale) in genArrayObjectPut() argument
622 scale, kWord); in genArrayObjectPut()
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| /dalvik/vm/compiler/codegen/mips/ |
| D | CodegenDriver.cpp | 473 RegLocation rlDest, int scale) in genArrayGet() argument
494 if (scale) { in genArrayGet()
495 opRegRegImm(cUnit, kOpLsl, regPtr, rlIndex.lowReg, scale); in genArrayGet()
507 if (scale) { in genArrayGet()
537 RegLocation rlSrc, int scale) in genArrayPut() argument
565 if (scale) { in genArrayPut()
566 opRegRegImm(cUnit, kOpLsl, tReg, rlIndex.lowReg, scale); in genArrayPut()
579 if (scale) { in genArrayPut()
609 RegLocation rlSrc, int scale) in genArrayObjectPut() argument
683 scale, kWord); in genArrayObjectPut()
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