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Searched refs:vB (Results 1 – 25 of 118) sorted by relevance

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/dalvik/vm/compiler/codegen/x86/
DLowerMove.cpp31 u2 vA, vB; in op_move() local
33 vB = INST_B(inst); in op_move()
34 get_virtual_reg(vB, OpndSize_32, 1, false/*isPhysical*/); in op_move()
43 u2 vA, vB; in op_move_from16() local
45 vB = FETCH(1); in op_move_from16()
46 get_virtual_reg(vB, OpndSize_32, 1, false); in op_move_from16()
55 u2 vA, vB; in op_move_16() local
57 vB = FETCH(2); in op_move_16()
58 get_virtual_reg(vB, OpndSize_32, 1, false); in op_move_16()
69 u2 vB = INST_B(inst); in op_move_wide() local
[all …]
DLowerAlu.cpp34 u2 vB = INST_B(inst); in op_neg_int() local
35 get_virtual_reg(vB, OpndSize_32, 1, false); in op_neg_int()
46 u2 vB = INST_B(inst); in op_not_int() local
47 get_virtual_reg(vB, OpndSize_32, 1, false); in op_not_int()
59 u2 vB = INST_B(inst); in op_neg_long() local
60 get_virtual_reg(vB, OpndSize_64, 1, false); in op_neg_long()
72 u2 vB = INST_B(inst); in op_not_long() local
73 get_virtual_reg(vB, OpndSize_64, 1, false); in op_not_long()
86 u2 vB = INST_B(inst); in op_neg_float() local
87 get_virtual_reg(vB, OpndSize_32, 1, false); in op_neg_float()
[all …]
DLowerGetPut.cpp444 int iget_iput_common_nohelper(int tmp, int flag, u2 vA, u2 vB, int isObj, bool isVolatile) { in iget_iput_common_nohelper() argument
462 requestVRFreeDelay(vB,VRDELAY_NULLCHECK); in iget_iput_common_nohelper()
463 get_virtual_reg(vB, OpndSize_32, 7, false); in iget_iput_common_nohelper()
464 nullCheck(7, false, 2, vB); //maybe optimized away, if not, call in iget_iput_common_nohelper()
465 cancelVRFreeDelayRequest(vB,VRDELAY_NULLCHECK); in iget_iput_common_nohelper()
528 int iget_iput_common(int tmp, int flag, u2 vA, u2 vB, int isObj, bool isVolatile) { in iget_iput_common() argument
529 return iget_iput_common_nohelper(tmp, flag, vA, vB, isObj, isVolatile); in iget_iput_common()
540 u2 vB = INST_B(inst); in op_iget() local
542 int retval = iget_iput_common(tmp, IGET, vA, vB, 0, false); in op_iget()
551 u2 vB = INST_B(inst); in op_iget_wide() local
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DLowerObject.cpp190 u2 vB = INST_B(inst); in op_instance_of() local
193 common_check_cast_instance_of(vB, tmp, true, vA); in op_instance_of()
296 u2 vB = INST_B(inst); in op_array_length() local
299 requestVRFreeDelay(vB,VRDELAY_NULLCHECK); // Request VR delay before transfer to temporary in op_array_length()
300 get_virtual_reg(vB, OpndSize_32, 1, false); in op_array_length()
301 nullCheck(1, false, 1, vB); //maybe optimized away in op_array_length()
302 cancelVRFreeDelayRequest(vB,VRDELAY_NULLCHECK); in op_array_length()
391 u2 vB = INST_B(inst); //length in op_new_array() local
397 get_virtual_reg(vB, OpndSize_32, 5, false); in op_new_array()
662 u2 vA, vB; in op_throw_verification_error() local
[all …]
/dalvik/dx/src/com/android/dx/ssa/
DSCCP.java306 int vB = ((CstInteger) cB).getValue(); in simulateBranch() local
309 constantSuccessor = (vA == vB); in simulateBranch()
312 constantSuccessor = (vA != vB); in simulateBranch()
315 constantSuccessor = (vA < vB); in simulateBranch()
318 constantSuccessor = (vA >= vB); in simulateBranch()
321 constantSuccessor = (vA <= vB); in simulateBranch()
324 constantSuccessor = (vA > vB); in simulateBranch()
403 int vB = ((CstInteger) cB).getValue(); in simulateMath() local
407 vR = vA + vB; in simulateMath()
412 vR = vB - vA; in simulateMath()
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/dalvik/vm/mterp/x86/
DOP_ADD_DOUBLE_2ADDR.S8 movq (rFP, rINST, 4), %xmm1 # %xmm1<- vB
11 addsd %xmm1, %xmm0 # %xmm0<- vA op vB
DOP_MUL_DOUBLE_2ADDR.S9 movq (rFP, rINST, 4), %xmm1 # %xmm1<- vB
12 mulsd %xmm1, %xmm0 # %xmm0<- vA op vB
DOP_SUB_DOUBLE_2ADDR.S9 movq (rFP, rINST, 4), %xmm1 # %xmm1<- vB
12 subsd %xmm1, %xmm0 # %xmm0<- vA op vB
/dalvik/vm/analysis/
DLiveness.cpp387 GEN(workBits, decInsn.vB); in processInstruction()
393 GEN(workBits, decInsn.vB); in processInstruction()
404 GEN(workBits, decInsn.vB); in processInstruction()
411 GEN(workBits, decInsn.vB); in processInstruction()
520 GEN(workBits, decInsn.vB); in processInstruction()
530 GEN(workBits, decInsn.vB); in processInstruction()
539 GENW(workBits, decInsn.vB); in processInstruction()
552 GENW(workBits, decInsn.vB); in processInstruction()
581 GEN(workBits, decInsn.vB); in processInstruction()
588 GEN(workBits, decInsn.vB); in processInstruction()
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DDexVerify.cpp905 okay &= checkRegisterIndex(meth, decInsn.vB); in verifyInstructions()
915 okay &= checkRegisterIndex(meth, decInsn.vB); in verifyInstructions()
922 okay &= checkWideRegisterIndex(meth, decInsn.vB); in verifyInstructions()
946 okay &= checkWideRegisterIndex(meth, decInsn.vB); in verifyInstructions()
951 okay &= checkStringIndex(pDvmDex, decInsn.vB); in verifyInstructions()
956 okay &= checkTypeIndex(pDvmDex, decInsn.vB); in verifyInstructions()
960 okay &= checkRegisterIndex(meth, decInsn.vB); in verifyInstructions()
965 okay &= checkNewInstance(pDvmDex, decInsn.vB); in verifyInstructions()
969 okay &= checkRegisterIndex(meth, decInsn.vB); in verifyInstructions()
1015 okay &= checkRegisterIndex(meth, decInsn.vB); in verifyInstructions()
[all …]
/dalvik/vm/compiler/template/mips/
DfunopWider.S15 LOAD(a0, a1) # a0<- vB
22 LOAD_F(fa0, a1) # fa0<- vB
DfunopNarrower.S21 LOAD64(rARG0, rARG1, t0) # a0/a1<- vB/vB+1
/dalvik/vm/mterp/arm-vfp/
Dfunop.S10 VREG_INDEX_TO_ADDR(r3, r3) @ r3<- &vB
11 flds s0, [r3] @ s0<- vB
DfunopWider.S10 VREG_INDEX_TO_ADDR(r3, r3) @ r3<- &vB
11 flds s0, [r3] @ s0<- vB
DfunopNarrower.S10 VREG_INDEX_TO_ADDR(r3, r3) @ r3<- &vB
11 fldd d0, [r3] @ d0<- vB
Dfbinop2addr.S11 VREG_INDEX_TO_ADDR(r3, r3) @ r3<- &vB
13 flds s1, [r3] @ s1<- vB
DfbinopWide2addr.S12 VREG_INDEX_TO_ADDR(r3, r3) @ r3<- &vB
14 fldd d1, [r3] @ d1<- vB
/dalvik/vm/mterp/mips/
DbinopLit16.S14 # binop/lit16 vA, vB, /* +CCCC */
18 GET_VREG(a0, a2) # a0 <- vB
DunopNarrower.S18 LOAD64(rARG0, rARG1, a3) # a0/a1 <- vB/vB+1
/dalvik/vm/mterp/armv6t2/
DOP_ARRAY_LENGTH.S7 GET_VREG(r0, r1) @ r0<- vB (object ref)
13 SET_VREG(r3, r2) @ vB<- length
DunopNarrower.S16 ldmia r3, {r0-r1} @ r0/r1<- vB/vB+1
Dbincmp.S13 GET_VREG(r3, r1) @ r3<- vB
16 cmp r2, r3 @ compare (vA, vB)
/dalvik/vm/mterp/armv5te/
DOP_ARRAY_LENGTH.S7 GET_VREG(r0, r1) @ r0<- vB (object ref)
14 SET_VREG(r3, r2) @ vB<- length
DunopNarrower.S17 ldmia r3, {r0-r1} @ r0/r1<- vB/vB+1
Dbincmp.S14 GET_VREG(r3, r1) @ r3<- vB
17 cmp r2, r3 @ compare (vA, vB)

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