/external/llvm/lib/Target/PowerPC/ |
D | PPCRegisterInfo.cpp | 82 ImmToIdxMap[PPC::ADDI] = PPC::ADD4; in PPCRegisterInfo() 231 unsigned ADDIInstr = is64Bit ? PPC::ADDI8 : PPC::ADDI; in eliminateCallFramePseudoInstr() 323 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), Reg) in lowerDynamicAlloc() 372 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) in lowerDynamicAlloc() 377 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) in lowerDynamicAlloc()
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D | PPCFrameLowering.cpp | 589 BuildMI(MBB, MBBI, dl, TII.get(PPC::ADDI), PPC::R1) in emitEpilogue() 604 BuildMI(MBB, MBBI, dl, TII.get(PPC::ADDI), PPC::R1) in emitEpilogue() 669 unsigned ADDIInstr = isPPC64 ? PPC::ADDI8 : PPC::ADDI; in emitEpilogue()
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D | PPCInstrInfo.cpp | 573 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), in StoreRegToStackSlot() 710 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), in LoadRegFromStackSlot()
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D | PPCCTRLoops.cpp | 424 return ((MI->getOpcode() == PPC::ADDI || MI->getOpcode() == PPC::ADDI8) && in isInductionOperation()
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D | PPCISelDAGToDAG.cpp | 686 SDValue AD = SDValue(CurDAG->getMachineNode(PPC::ADDI, dl, MVT::i32, Op, in SelectSETCC() 842 unsigned Opc = N->getValueType(0) == MVT::i32 ? PPC::ADDI : PPC::ADDI8; in Select()
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D | PPCInstrInfo.td | 941 def ADDI : DForm_2<14, (outs GPRC:$rD), (ins GPRC:$rA, s16imm:$imm), 1462 (ADDIS (ADDI GPRC:$in, (LO16 imm:$imm)), (HA16 imm:$imm))>;
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/external/qemu/tcg/ppc/ |
D | tcg-target.c | 315 #define ADDI OPCD(14) macro 449 tcg_out32 (s, ADDI | RT (ret) | RA (0) | (arg & 0xffff)); in tcg_out_movi() 695 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_ld() 701 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_ld() 881 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_st() 888 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_st() 955 tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size); in tcg_target_qemu_prologue() 977 tcg_out32 (s, ADDI | RT (rt) | RA (ra) | (si & 0xffff)); in ppc_addi() 981 tcg_out32 (s, ADDI | RT (rt) | RA (rt) | (si & 0xffff)); in ppc_addi()
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/external/qemu/tcg/ppc64/ |
D | tcg-target.c | 303 #define ADDI OPCD( 14) macro 453 tcg_out32 (s, ADDI | RT (ret) | RA (0) | (arg & 0xffff)); in tcg_out_movi32() 741 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_ld() 850 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_st() 923 tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size); in tcg_target_qemu_prologue() 951 tcg_out32 (s, ADDI | RT (rt) | RA (ra) | (si & 0xffff)); in ppc_addi32() 955 tcg_out32 (s, ADDI | RT (rt) | RA (rt) | (si & 0xffff)); in ppc_addi32()
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/external/v8/src/mips/ |
D | constants-mips.cc | 311 case ADDI: in InstructionType()
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D | constants-mips.h | 263 ADDI = ((1 << 3) + 0) << kOpcodeShift, enumerator
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D | disasm-mips.cc | 846 case ADDI: in DecodeTypeImmediate()
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D | simulator-mips.cc | 2407 case ADDI: in DecodeTypeImmediate() 2547 case ADDI: in DecodeTypeImmediate()
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/external/llvm/lib/Target/MBlaze/ |
D | MBlazeInstrFormats.td | 19 def FRRI : Format<2>; // ADDI, ORI, etc.
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D | MBlazeInstrInfo.td | 421 def ADDI : ArithI<0x08, "addi ", addc, simm16, immSExt16>;
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/external/llvm/lib/Target/MBlaze/Disassembler/ |
D | MBlazeDisassembler.cpp | 42 MBlaze::ADDI, MBlaze::RSUBI, MBlaze::ADDIC, MBlaze::RSUBIC, //08,09,0A,0B
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 2737 if (ConstantSDNode *ADDI = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { in visitAND() local 2738 APInt ADDC = ADDI->getAPIntValue(); in visitAND()
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