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Searched refs:ADDI (Results 1 – 16 of 16) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.cpp82 ImmToIdxMap[PPC::ADDI] = PPC::ADD4; in PPCRegisterInfo()
231 unsigned ADDIInstr = is64Bit ? PPC::ADDI8 : PPC::ADDI; in eliminateCallFramePseudoInstr()
323 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), Reg) in lowerDynamicAlloc()
372 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) in lowerDynamicAlloc()
377 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), MI.getOperand(0).getReg()) in lowerDynamicAlloc()
DPPCFrameLowering.cpp589 BuildMI(MBB, MBBI, dl, TII.get(PPC::ADDI), PPC::R1) in emitEpilogue()
604 BuildMI(MBB, MBBI, dl, TII.get(PPC::ADDI), PPC::R1) in emitEpilogue()
669 unsigned ADDIInstr = isPPC64 ? PPC::ADDI8 : PPC::ADDI; in emitEpilogue()
DPPCInstrInfo.cpp573 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), in StoreRegToStackSlot()
710 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::ADDI), PPC::R0), in LoadRegFromStackSlot()
DPPCCTRLoops.cpp424 return ((MI->getOpcode() == PPC::ADDI || MI->getOpcode() == PPC::ADDI8) && in isInductionOperation()
DPPCISelDAGToDAG.cpp686 SDValue AD = SDValue(CurDAG->getMachineNode(PPC::ADDI, dl, MVT::i32, Op, in SelectSETCC()
842 unsigned Opc = N->getValueType(0) == MVT::i32 ? PPC::ADDI : PPC::ADDI8; in Select()
DPPCInstrInfo.td941 def ADDI : DForm_2<14, (outs GPRC:$rD), (ins GPRC:$rA, s16imm:$imm),
1462 (ADDIS (ADDI GPRC:$in, (LO16 imm:$imm)), (HA16 imm:$imm))>;
/external/qemu/tcg/ppc/
Dtcg-target.c315 #define ADDI OPCD(14) macro
449 tcg_out32 (s, ADDI | RT (ret) | RA (0) | (arg & 0xffff)); in tcg_out_movi()
695 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_ld()
701 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_ld()
881 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_st()
888 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_st()
955 tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size); in tcg_target_qemu_prologue()
977 tcg_out32 (s, ADDI | RT (rt) | RA (ra) | (si & 0xffff)); in ppc_addi()
981 tcg_out32 (s, ADDI | RT (rt) | RA (rt) | (si & 0xffff)); in ppc_addi()
/external/qemu/tcg/ppc64/
Dtcg-target.c303 #define ADDI OPCD( 14) macro
453 tcg_out32 (s, ADDI | RT (ret) | RA (0) | (arg & 0xffff)); in tcg_out_movi32()
741 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_ld()
850 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4); in tcg_out_qemu_st()
923 tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size); in tcg_target_qemu_prologue()
951 tcg_out32 (s, ADDI | RT (rt) | RA (ra) | (si & 0xffff)); in ppc_addi32()
955 tcg_out32 (s, ADDI | RT (rt) | RA (rt) | (si & 0xffff)); in ppc_addi32()
/external/v8/src/mips/
Dconstants-mips.cc311 case ADDI: in InstructionType()
Dconstants-mips.h263 ADDI = ((1 << 3) + 0) << kOpcodeShift, enumerator
Ddisasm-mips.cc846 case ADDI: in DecodeTypeImmediate()
Dsimulator-mips.cc2407 case ADDI: in DecodeTypeImmediate()
2547 case ADDI: in DecodeTypeImmediate()
/external/llvm/lib/Target/MBlaze/
DMBlazeInstrFormats.td19 def FRRI : Format<2>; // ADDI, ORI, etc.
DMBlazeInstrInfo.td421 def ADDI : ArithI<0x08, "addi ", addc, simm16, immSExt16>;
/external/llvm/lib/Target/MBlaze/Disassembler/
DMBlazeDisassembler.cpp42 MBlaze::ADDI, MBlaze::RSUBI, MBlaze::ADDIC, MBlaze::RSUBIC, //08,09,0A,0B
/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp2737 if (ConstantSDNode *ADDI = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { in visitAND() local
2738 APInt ADDC = ADDI->getAPIntValue(); in visitAND()