| /external/llvm/lib/Transforms/Utils/ |
| D | AddrModeMatcher.cpp | 82 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg) in MatchScaledValue()
85 ExtAddrMode TestAddrMode = AddrMode; in MatchScaledValue()
97 AddrMode = TestAddrMode; in MatchScaledValue()
112 AddrMode = TestAddrMode; in MatchScaledValue()
183 ExtAddrMode BackupAddrMode = AddrMode; in MatchOperationAddr()
190 AddrMode = BackupAddrMode; in MatchOperationAddr()
199 AddrMode = BackupAddrMode; in MatchOperationAddr()
251 AddrMode.BaseOffs += ConstantOffset; in MatchOperationAddr()
252 if (ConstantOffset == 0 || TLI.isLegalAddressingMode(AddrMode, AccessTy)){ in MatchOperationAddr()
257 AddrMode.BaseOffs -= ConstantOffset; in MatchOperationAddr()
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb2InstrInfo.cpp | 393 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteT2FrameIndex() local
398 AddrMode = ARMII::AddrModeT2_i12; // FIXME. mode for thumb2? in rewriteT2FrameIndex()
468 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in rewriteT2FrameIndex()
474 if (AddrMode == ARMII::AddrModeT2_so) { in rewriteT2FrameIndex()
484 AddrMode = ARMII::AddrModeT2_i12; in rewriteT2FrameIndex()
489 if (AddrMode == ARMII::AddrModeT2_i8 || AddrMode == ARMII::AddrModeT2_i12) { in rewriteT2FrameIndex()
503 } else if (AddrMode == ARMII::AddrMode5) { in rewriteT2FrameIndex()
534 if (AddrMode == ARMII::AddrMode5) in rewriteT2FrameIndex()
548 if (AddrMode == ARMII::AddrMode5) in rewriteT2FrameIndex()
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| D | ARMInstrFormats.td | 90 class AddrMode<bits<5> val> {
93 def AddrModeNone : AddrMode<0>;
94 def AddrMode1 : AddrMode<1>;
95 def AddrMode2 : AddrMode<2>;
96 def AddrMode3 : AddrMode<3>;
97 def AddrMode4 : AddrMode<4>;
98 def AddrMode5 : AddrMode<5>;
99 def AddrMode6 : AddrMode<6>;
100 def AddrModeT1_1 : AddrMode<7>;
101 def AddrModeT1_2 : AddrMode<8>;
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| D | ARMBaseRegisterInfo.cpp | 805 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset() local
809 switch (AddrMode) { in getFrameIndexInstrOffset()
996 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal() local
1005 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in isFrameOffsetLegal()
1011 switch (AddrMode) { in isFrameOffsetLegal()
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| D | ARMISelLowering.h | 295 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty)const;
296 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
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| D | Thumb1RegisterInfo.cpp | 395 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteFrameIndex() local
482 if (AddrMode != ARMII::AddrModeT1_s) in rewriteFrameIndex()
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| D | ARMBaseInstrInfo.cpp | 146 unsigned AddrMode = (TSFlags & ARMII::AddrModeMask); in convertToThreeAddress() local
158 switch (AddrMode) { in convertToThreeAddress()
1768 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteARMFrameIndex() local
1773 AddrMode = ARMII::AddrMode2; in rewriteARMFrameIndex()
1816 switch (AddrMode) { in rewriteARMFrameIndex()
1876 if (AddrMode == ARMII::AddrMode_i12) in rewriteARMFrameIndex()
1889 if (AddrMode == ARMII::AddrMode_i12) in rewriteARMFrameIndex()
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| D | ARMInstrThumb.td | 554 AddrMode am, InstrItinClass itin_r,
571 AddrMode am, InstrItinClass itin_r,
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| /external/llvm/include/llvm/Transforms/Utils/ |
| D | AddrModeMatcher.h | 36 struct ExtAddrMode : public TargetLowering::AddrMode {
66 ExtAddrMode &AddrMode; variable
76 : AddrModeInsts(AMI), TLI(T), AccessTy(AT), MemoryInst(MI), AddrMode(AM) { in AddressingModeMatcher()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | CodeGenPrepare.cpp | 834 ExtAddrMode AddrMode; in OptimizeMemoryInst() local
864 AddrMode = NewAddrMode; in OptimizeMemoryInst()
867 } else if (NewAddrMode == AddrMode) { in OptimizeMemoryInst()
907 DEBUG(dbgs() << "CGP: Found local addrmode: " << AddrMode << "\n"); in OptimizeMemoryInst()
922 DEBUG(dbgs() << "CGP: Reusing nonlocal addrmode: " << AddrMode << " for " in OptimizeMemoryInst()
927 DEBUG(dbgs() << "CGP: SINKING nonlocal addrmode: " << AddrMode << " for " in OptimizeMemoryInst()
939 if (AddrMode.BaseReg) { in OptimizeMemoryInst()
940 Value *V = AddrMode.BaseReg; in OptimizeMemoryInst()
949 if (AddrMode.Scale) { in OptimizeMemoryInst()
950 Value *V = AddrMode.ScaledReg; in OptimizeMemoryInst()
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| D | LoopStrengthReduce.cpp | 228 TargetLowering::AddrMode AM;
1272 static bool isLegalUse(const TargetLowering::AddrMode &AM, in isLegalUse()
1329 static bool isLegalUse(TargetLowering::AddrMode AM, in isLegalUse()
1360 TargetLowering::AddrMode AM; in isAlwaysFoldable()
1398 TargetLowering::AddrMode AM; in isAlwaysFoldable()
2023 TargetLowering::AddrMode AM; in OptimizeLoopTermCond()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 191 enum AddrMode { enum
211 inline static const char *AddrModeToString(AddrMode addrmode) { in AddrModeToString()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.h | 89 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const;
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| D | NVPTXISelLowering.cpp | 1203 NVPTXTargetLowering::isLegalAddressingMode(const AddrMode &AM, in isLegalAddressingMode()
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelLowering.h | 173 virtual bool isLegalAddressingMode(const AddrMode &AM,
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 149 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const;
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| D | HexagonISelLowering.cpp | 1553 bool HexagonTargetLowering::isLegalAddressingMode(const AddrMode &AM, in isLegalAddressingMode()
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| /external/v8/src/arm/ |
| D | assembler-arm.h | 459 explicit MemOperand(Register rn, int32_t offset = 0, AddrMode am = Offset);
464 explicit MemOperand(Register rn, Register rm, AddrMode am = Offset);
470 ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
484 AddrMode am() const { return am_; } in am()
496 AddrMode am_; // bits P, U, and W
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| D | constants-arm.h | 318 enum AddrMode { enum
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| D | assembler-arm.cc | 208 MemOperand::MemOperand(Register rn, int32_t offset, AddrMode am) { in MemOperand()
215 MemOperand::MemOperand(Register rn, Register rm, AddrMode am) { in MemOperand()
225 ShiftOp shift_op, int shift_imm, AddrMode am) { in MemOperand()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.h | 103 virtual bool isLegalAddressingMode(const AddrMode &AM,
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| D | XCoreISelLowering.cpp | 1568 XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, in isLegalAddressingMode()
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 1621 struct AddrMode { struct
1626 AddrMode() : BaseGV(0), BaseOffs(0), HasBaseReg(false), Scale(0) {} in AddrMode() argument
1645 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 343 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty)const;
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 583 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty)const;
|