/external/llvm/lib/Target/Hexagon/ |
D | HexagonExpandPredSpillCode.cpp | 89 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() 92 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::ADD_rr), in runOnMachineFunction() 95 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::TFR_RsPd), in runOnMachineFunction() 97 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() 102 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::ADD_ri), in runOnMachineFunction() 104 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::TFR_RsPd), in runOnMachineFunction() 106 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() 113 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::TFR_RsPd), in runOnMachineFunction() 115 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() 133 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() [all …]
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D | HexagonSplitTFRCondSets.cpp | 106 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Opc1), in runOnMachineFunction() 110 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Opc2), in runOnMachineFunction() 125 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() 130 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() 135 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() 151 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() 156 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() 165 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() 181 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() 184 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction() [all …]
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D | HexagonRegisterInfo.cpp | 197 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex() 199 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex() 203 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex() 226 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex() 228 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex() 232 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex() 246 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex() 248 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex() 254 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex() 262 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex() [all …]
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/external/llvm/lib/Target/PowerPC/ |
D | PPCFrameLowering.cpp | 136 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate() 140 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate() 145 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate() 149 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate() 154 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate() 158 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate() 162 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate() 315 BuildMI(MBB, MBBI, dl, TII.get(PPC::MFLR8), PPC::X0); in emitPrologue() 318 BuildMI(MBB, MBBI, dl, TII.get(PPC::STD)) in emitPrologue() 324 BuildMI(MBB, MBBI, dl, TII.get(PPC::STD)) in emitPrologue() [all …]
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D | PPCInstrInfo.cpp | 182 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) in commuteInstruction() 206 BuildMI(MBB, MI, DL, get(PPC::NOP)); in insertNoop() 390 BuildMI(&MBB, DL, get(PPC::B)).addMBB(TBB); in InsertBranch() 392 BuildMI(&MBB, DL, get(Cond[0].getImm() ? in InsertBranch() 396 BuildMI(&MBB, DL, get(PPC::BCC)) in InsertBranch() 403 BuildMI(&MBB, DL, get(Cond[0].getImm() ? in InsertBranch() 407 BuildMI(&MBB, DL, get(PPC::BCC)) in InsertBranch() 409 BuildMI(&MBB, DL, get(PPC::B)).addMBB(FBB); in InsertBranch() 435 BuildMI(MBB, I, DL, MCID, DestReg) in copyPhysReg() 438 BuildMI(MBB, I, DL, MCID, DestReg).addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg() [all …]
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D | PPCRegisterInfo.cpp | 239 BuildMI(MBB, I, dl, TII.get(ADDIInstr), StackReg) in eliminateCallFramePseudoInstr() 244 BuildMI(MBB, MBBI, dl, TII.get(LISInstr), TmpReg) in eliminateCallFramePseudoInstr() 246 BuildMI(MBB, MBBI, dl, TII.get(ORIInstr), TmpReg) in eliminateCallFramePseudoInstr() 249 BuildMI(MBB, MBBI, dl, TII.get(ADDInstr), StackReg) in eliminateCallFramePseudoInstr() 323 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), Reg) in lowerDynamicAlloc() 328 BuildMI(MBB, II, dl, TII.get(PPC::LD), Reg) in lowerDynamicAlloc() 332 BuildMI(MBB, II, dl, TII.get(PPC::LD), PPC::X0) in lowerDynamicAlloc() 336 BuildMI(MBB, II, dl, TII.get(PPC::LWZ), Reg) in lowerDynamicAlloc() 345 BuildMI(MBB, II, dl, TII.get(PPC::STDUX), PPC::X1) in lowerDynamicAlloc() 350 BuildMI(MBB, II, dl, TII.get(PPC::STDUX), PPC::X1) in lowerDynamicAlloc() [all …]
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D | PPCBranchSelector.cpp | 152 BuildMI(MBB, I, dl, TII->get(PPC::BCC)) in runOnMachineFunction() 155 BuildMI(MBB, I, dl, TII->get(PPC::BDZ)).addImm(2); in runOnMachineFunction() 157 BuildMI(MBB, I, dl, TII->get(PPC::BDZ8)).addImm(2); in runOnMachineFunction() 159 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ)).addImm(2); in runOnMachineFunction() 161 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ8)).addImm(2); in runOnMachineFunction() 167 I = BuildMI(MBB, I, dl, TII->get(PPC::B)).addMBB(Dest); in runOnMachineFunction()
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/external/llvm/lib/Target/CellSPU/ |
D | SPUFrameLowering.cpp | 120 BuildMI(MBB, MBBI, dl, TII.get(SPU::PROLOG_LABEL)).addSym(FrameLabel); in emitPrologue() 125 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R0).addImm(16) in emitPrologue() 129 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R1).addImm(FrameSize) in emitPrologue() 132 BuildMI(MBB, MBBI, dl, TII.get(SPU::AIr32), SPU::R1).addReg(SPU::R1) in emitPrologue() 137 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr128), SPU::R2) in emitPrologue() 140 BuildMI(MBB, MBBI, dl, TII.get(SPU::ILr32), SPU::R2) in emitPrologue() 142 BuildMI(MBB, MBBI, dl, TII.get(SPU::STQXr32), SPU::R1) in emitPrologue() 145 BuildMI(MBB, MBBI, dl, TII.get(SPU::Ar32), SPU::R1) in emitPrologue() 148 BuildMI(MBB, MBBI, dl, TII.get(SPU::SFIr32), SPU::R2) in emitPrologue() 151 BuildMI(MBB, MBBI, dl, TII.get(SPU::LQXr128), SPU::R2) in emitPrologue() [all …]
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D | SPUInstrInfo.cpp | 134 BuildMI(MBB, I, DL, get(SPU::LRr128), DestReg) in copyPhysReg() 167 addFrameReference(BuildMI(MBB, MI, DL, get(opc)) in storeRegToStackSlot() 200 addFrameReference(BuildMI(MBB, MI, DL, get(opc), DestReg), FrameIdx); in loadRegFromStackSlot() 364 MIB = BuildMI(&MBB, DL, get(SPU::HBR_LABEL)).addSym(branchLabel); in InsertBranch() 370 MIB = BuildMI(&MBB, DL, get(SPU::BR)); in InsertBranch() 378 MIB = BuildMI( MBB, findHBRPosition(MBB), DL, get(SPU::HBRA)); in InsertBranch() 384 MIB = BuildMI(&MBB, DL, get(Cond[0].getImm())); in InsertBranch() 388 MIB = BuildMI(MBB, findHBRPosition(MBB), DL, get(SPU::HBRA)); in InsertBranch() 398 MIB = BuildMI(&MBB, DL, get(Cond[0].getImm())); in InsertBranch() 399 MachineInstrBuilder MIB2 = BuildMI(&MBB, DL, get(SPU::BR)); in InsertBranch() [all …]
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXInstrInfo.cpp | 42 BuildMI(MBB, I, DL, get(NVPTX::IMOV32rr), DestReg) in copyPhysReg() 46 BuildMI(MBB, I, DL, get(NVPTX::IMOV8rr), DestReg) in copyPhysReg() 50 BuildMI(MBB, I, DL, get(NVPTX::IMOV1rr), DestReg) in copyPhysReg() 54 BuildMI(MBB, I, DL, get(NVPTX::FMOV32rr), DestReg) in copyPhysReg() 58 BuildMI(MBB, I, DL, get(NVPTX::IMOV16rr), DestReg) in copyPhysReg() 62 BuildMI(MBB, I, DL, get(NVPTX::IMOV64rr), DestReg) in copyPhysReg() 66 BuildMI(MBB, I, DL, get(NVPTX::FMOV64rr), DestReg) in copyPhysReg() 70 BuildMI(MBB, I, DL, get(NVPTX::V4f32Mov), DestReg) in copyPhysReg() 74 BuildMI(MBB, I, DL, get(NVPTX::V4i32Mov), DestReg) in copyPhysReg() 78 BuildMI(MBB, I, DL, get(NVPTX::V2f32Mov), DestReg) in copyPhysReg() [all …]
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D | NVPTXFrameLowering.cpp | 45 MachineInstr *MI = BuildMI(MBB, MBBI, dl, in emitPrologue() 48 BuildMI(MBB, MI, dl, in emitPrologue() 52 MachineInstr *MI = BuildMI(MBB, MBBI, dl, in emitPrologue() 55 BuildMI(MBB, MI, dl, in emitPrologue() 63 BuildMI(MBB, MBBI, dl, in emitPrologue() 67 BuildMI(MBB, MBBI, dl, in emitPrologue()
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/external/llvm/lib/Target/Mips/ |
D | MipsLongBranch.cpp | 223 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc); in replaceBranch() 282 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch() 284 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)).addReg(Mips::RA) in expandToLongBranch() 286 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::BAL_BR)).addMBB(BalTgtMBB); in expandToLongBranch() 287 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LUi), Mips::AT).addImm(Hi) in expandToLongBranch() 292 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::AT) in expandToLongBranch() 294 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) in expandToLongBranch() 296 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA) in expandToLongBranch() 298 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::JR)).addReg(Mips::AT); in expandToLongBranch() 299 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch() [all …]
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/external/llvm/include/llvm/CodeGen/ |
D | MachineInstrBuilder.h | 195 inline MachineInstrBuilder BuildMI(MachineFunction &MF, in BuildMI() function 204 inline MachineInstrBuilder BuildMI(MachineFunction &MF, in BuildMI() function 216 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function 226 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function 236 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function 243 return BuildMI(BB, MII, DL, MCID, DestReg); in BuildMI() 247 return BuildMI(BB, MII, DL, MCID, DestReg); in BuildMI() 254 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function 263 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function 272 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function [all …]
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstrInfo.cpp | 121 MachineInstrBuilder MIB = BuildMI(MF, dl, get(SP::DBG_VALUE)) in emitFrameIndexDebugValue() 205 BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(Opcode)) in AnalyzeBranch() 207 BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(SP::BA)) in AnalyzeBranch() 240 BuildMI(&MBB, DL, get(SP::BA)).addMBB(TBB); in InsertBranch() 248 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC); in InsertBranch() 250 BuildMI(&MBB, DL, get(SP::FBCOND)).addMBB(TBB).addImm(CC); in InsertBranch() 254 BuildMI(&MBB, DL, get(SP::BA)).addMBB(FBB); in InsertBranch() 285 BuildMI(MBB, I, DL, get(SP::ORrr), DestReg).addReg(SP::G0) in copyPhysReg() 288 BuildMI(MBB, I, DL, get(SP::FMOVS), DestReg) in copyPhysReg() 291 BuildMI(MBB, I, DL, get(Subtarget.isV9() ? SP::FMOVD : SP::FpMOVD), DestReg) in copyPhysReg() [all …]
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D | SparcFrameLowering.cpp | 55 BuildMI(MBB, MBBI, dl, TII.get(SP::SAVEri), SP::O6) in emitPrologue() 61 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi); in emitPrologue() 63 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1) in emitPrologue() 65 BuildMI(MBB, MBBI, dl, TII.get(SP::SAVErr), SP::O6) in emitPrologue() 78 BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0) in emitEpilogue()
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/external/llvm/lib/Target/XCore/ |
D | XCoreRegisterInfo.cpp | 139 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode)) in eliminateCallFramePseudoInstr() 144 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode), XCore::SP) in eliminateCallFramePseudoInstr() 229 BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg) in eliminateFrameIndex() 234 BuildMI(MBB, II, dl, TII.get(XCore::STW_3r)) in eliminateFrameIndex() 240 BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg) in eliminateFrameIndex() 250 BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg) in eliminateFrameIndex() 255 BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus)) in eliminateFrameIndex() 261 BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg) in eliminateFrameIndex() 279 BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg) in eliminateFrameIndex() 284 BuildMI(MBB, II, dl, TII.get(NewOpcode)) in eliminateFrameIndex() [all …]
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D | XCoreInstrInfo.cpp | 287 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(TBB); in InsertBranch() 291 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()) in InsertBranch() 300 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()) in InsertBranch() 302 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(FBB); in InsertBranch() 342 BuildMI(MBB, I, DL, get(XCore::ADD_2rus), DestReg) in copyPhysReg() 349 BuildMI(MBB, I, DL, get(XCore::LDAWSP_ru6), DestReg).addImm(0); in copyPhysReg() 354 BuildMI(MBB, I, DL, get(XCore::SETSP_1r)) in copyPhysReg() 370 BuildMI(MBB, I, DL, get(XCore::STWFI)) in storeRegToStackSlot() 384 BuildMI(MBB, I, DL, get(XCore::LDWFI), DestReg) in loadRegFromStackSlot() 393 MachineInstrBuilder MIB = BuildMI(MF, DL, get(XCore::DBG_VALUE)) in emitFrameIndexDebugValue()
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D | XCoreFrameLowering.cpp | 55 BuildMI(MBB, I, dl, TII.get(Opcode), DstReg) in loadFromStack() 70 BuildMI(MBB, I, dl, TII.get(Opcode)) in storeToStack() 134 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize); in emitPrologue() 141 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel); in emitPrologue() 160 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLRLabel); in emitPrologue() 176 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveR10Label); in emitPrologue() 183 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr) in emitPrologue() 188 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel); in emitPrologue() 224 BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)) in emitEpilogue() 263 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize); in emitEpilogue() [all …]
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/external/llvm/lib/Target/MBlaze/ |
D | MBlazeFrameLowering.cpp | 255 BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), r) in interruptFrameLayout() 263 BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), MBlaze::R17) in interruptFrameLayout() 266 BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), MBlaze::R18) in interruptFrameLayout() 272 BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::MFS), MBlaze::R11) in interruptFrameLayout() 274 BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), MBlaze::R11) in interruptFrameLayout() 277 BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), MBlaze::R11) in interruptFrameLayout() 279 BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::MTS), MBlaze::RMSR) in interruptFrameLayout() 284 BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), MBlaze::R18) in interruptFrameLayout() 287 BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), MBlaze::R17) in interruptFrameLayout() 293 BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), r) in interruptFrameLayout() [all …]
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D | MBlazeInstrInfo.cpp | 80 BuildMI(MBB, MI, DL, get(MBlaze::NOP)); in insertNoop() 88 llvm::BuildMI(MBB, I, DL, get(MBlaze::ADDK), DestReg) in copyPhysReg() 98 BuildMI(MBB, I, DL, get(MBlaze::SWI)).addReg(SrcReg,getKillRegState(isKill)) in storeRegToStackSlot() 108 BuildMI(MBB, I, DL, get(MBlaze::LWI), DestReg) in loadRegFromStackSlot() 202 BuildMI(&MBB, DL, get(Opc)).addMBB(TBB); in InsertBranch() 204 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()).addMBB(TBB); in InsertBranch() 208 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()).addMBB(TBB); in InsertBranch() 209 BuildMI(&MBB, DL, get(MBlaze::BRID)).addMBB(FBB); in InsertBranch() 291 BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), in getGlobalBaseReg()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430FrameLowering.cpp | 66 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r)) in emitPrologue() 70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW) in emitPrologue() 98 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SPW) in emitPrologue() 135 BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::FPW); in emitEpilogue() 156 BuildMI(MBB, MBBI, DL, in emitEpilogue() 160 BuildMI(MBB, MBBI, DL, in emitEpilogue() 170 BuildMI(MBB, MBBI, DL, TII.get(MSP430::ADD16ri), MSP430::SPW) in emitEpilogue() 199 BuildMI(MBB, MI, DL, TII.get(MSP430::PUSH16r)) in spillCalleeSavedRegisters() 220 BuildMI(MBB, MI, DL, TII.get(MSP430::POP16r), CSI[i].getReg()); in restoreCalleeSavedRegisters()
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/external/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 295 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg)); in FastEmitInst_() 306 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg) in FastEmitInst_r() 309 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in FastEmitInst_r() 311 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in FastEmitInst_r() 326 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg) in FastEmitInst_rr() 330 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in FastEmitInst_rr() 333 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in FastEmitInst_rr() 349 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg) in FastEmitInst_rrr() 354 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in FastEmitInst_rrr() 358 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in FastEmitInst_rrr() [all …]
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/external/llvm/lib/Target/X86/ |
D | X86FrameLowering.cpp | 174 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc)) in emitSPUpdate() 186 MI = addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr), in emitSPUpdate() 189 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in emitSPUpdate() 694 BuildMI(MBB, MBBI, DL, in emitPrologue() 740 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r)) in emitPrologue() 747 BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)) in emitPrologue() 768 BuildMI(MBB, MBBI, DL, in emitPrologue() 776 BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)) in emitPrologue() 807 BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)).addSym(Label); in emitPrologue() 829 BuildMI(MBB, MBBI, DL, in emitPrologue() [all …]
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D | X86FastISel.cpp | 227 addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, in X86FastEmitLoad() 246 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in X86FastEmitStore() 277 addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, in X86FastEmitStore() 306 addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, in X86FastEmitStore() 563 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), LoadReg); in X86SelectAddress() 805 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), in X86SelectRet() 813 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::RET)); in X86SelectRet() 891 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CompareImmOpc)) in X86FastEmitCompare() 903 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CompareOpc)) in X86FastEmitCompare() 927 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::SETEr), EReg); in X86SelectCmp() [all …]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | FastISel.cpp | 215 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in materializeRegForValue() 558 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in SelectCall() 623 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in SelectCall() 641 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall() 646 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall() 650 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall() 654 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall() 658 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall() 764 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), in SelectBitCast() 1169 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg); in FastEmitInst_() [all …]
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