| /external/icu4c/data/brkitr/ |
| D | line_he.txt | 35 # LF ID CM AL AL
38 # LF CM AL AL
40 # Our CM, which in the first example was attached to the ideograph,
46 # a CM to see whether it attaches to something further on or not.
49 # If the CM is unattached, we need to force a break.
69 $CM = [:LineBreak = Combining_Mark:];
116 # Combining Marks. X $CM* behaves as if it were X. Rule LB6.
118 $ALcm = $ALPlus $CM*;
119 $HLcm = $HL $CM*;
120 $BAcm = $BA $CM*;
[all …]
|
| D | line_fi.txt | 35 # LF ID CM AL AL
38 # LF CM AL AL
40 # Our CM, which in the first example was attached to the ideograph,
46 # a CM to see whether it attaches to something further on or not.
49 # If the CM is unattached, we need to force a break.
68 $CM = [:LineBreak = Combining_Mark:];
115 # Combining Marks. X $CM* behaves as if it were X. Rule LB6.
117 $ALcm = $ALPlus $CM*;
118 $BAcm = $BA $CM*;
119 $HHcm = $HH $CM*;
[all …]
|
| D | line_ja.txt | 35 # LF ID CM AL AL
38 # LF CM AL AL
40 # Our CM, which in the first example was attached to the ideograph,
46 # a CM to see whether it attaches to something further on or not.
49 # If the CM is unattached, we need to force a break.
72 $CM = [:LineBreak = Combining_Mark:];
119 # Combining Marks. X $CM* behaves as if it were X. Rule LB6.
121 $ALcm = $ALPlus $CM*;
122 $BAcm = $BA $CM*;
123 $BBcm = $BB $CM*;
[all …]
|
| D | line.txt | 35 # LF ID CM AL AL
38 # LF CM AL AL
40 # Our CM, which in the first example was attached to the ideograph,
46 # a CM to see whether it attaches to something further on or not.
49 # If the CM is unattached, we need to force a break.
67 $CM = [:LineBreak = Combining_Mark:];
114 # Combining Marks. X $CM* behaves as if it were X. Rule LB6.
116 $ALcm = $ALPlus $CM*;
117 $BAcm = $BA $CM*;
118 $BBcm = $BB $CM*;
[all …]
|
| /external/icu4c/test/testdata/ |
| D | LineBreakTest.txt | 27 × 0023 × 0308 × 0023 ÷ # × [0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM) × [28.0] NUMBER…
28 × 0023 × 0308 × 0020 ÷ 0023 ÷ # × [0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM) × [7.01]…
31 × 0023 × 0308 ÷ 2014 ÷ # × [0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM) ÷ [999.0] EM DA…
32 × 0023 × 0308 × 0020 ÷ 2014 ÷ # × [0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM) × [7.01]…
35 × 0023 × 0308 × 0009 ÷ # × [0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM) × [21.01] <CHAR…
36 × 0023 × 0308 × 0020 ÷ 0009 ÷ # × [0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM) × [7.01]…
39 × 0023 × 0308 ÷ 00B4 ÷ # × [0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM) ÷ [999.0] ACUTE…
40 × 0023 × 0308 × 0020 ÷ 00B4 ÷ # × [0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM) × [7.01]…
43 × 0023 × 0308 × 000B ÷ # × [0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM) × [6.0] <LINE T…
44 × 0023 × 0308 × 0020 × 000B ÷ # × [0.3] NUMBER SIGN (AL) × [9.0] COMBINING DIAERESIS (CM) × [7.01]…
[all …]
|
| /external/icu4c/data/unidata/ |
| D | LineBreak.txt | 17 # "BK", "CR", "LF", "CM", "SG", "GL", "CB", "SP", "ZW",
46 0000..0008;CM
51 000E..001F;CM
81 007F..0084;CM
83 0086..009F;CM
124 0300..034E;CM
126 0350..035B;CM
128 0363..036F;CM
136 0483..0489;CM
143 0591..05BD;CM
[all …]
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcTargetMachine.cpp | 31 Reloc::Model RM, CodeModel::Model CM, in SparcTargetMachine() argument
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in SparcTargetMachine()
83 CodeModel::Model CM, in SparcV8TargetMachine() argument
85 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { in SparcV8TargetMachine()
95 CodeModel::Model CM, in SparcV9TargetMachine() argument
97 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { in SparcV9TargetMachine()
|
| D | SparcTargetMachine.h | 38 Reloc::Model RM, CodeModel::Model CM,
69 Reloc::Model RM, CodeModel::Model CM,
81 Reloc::Model RM, CodeModel::Model CM,
|
| /external/llvm/lib/Target/ |
| D | TargetMachineC.cpp | 80 CodeModel::Model CM; in LLVMCreateTargetMachine() local
83 CM = CodeModel::JITDefault; in LLVMCreateTargetMachine()
86 CM = CodeModel::Small; in LLVMCreateTargetMachine()
89 CM = CodeModel::Kernel; in LLVMCreateTargetMachine()
92 CM = CodeModel::Medium; in LLVMCreateTargetMachine()
95 CM = CodeModel::Large; in LLVMCreateTargetMachine()
98 CM = CodeModel::Default; in LLVMCreateTargetMachine()
120 CM, OL)); in LLVMCreateTargetMachine()
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXTargetMachine.cpp | 69 CodeModel::Model CM, in NVPTXTargetMachine() argument
72 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in NVPTXTargetMachine()
86 Reloc::Model RM, CodeModel::Model CM, in NVPTXTargetMachine32() argument
88 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { in NVPTXTargetMachine32()
96 Reloc::Model RM, CodeModel::Model CM, in NVPTXTargetMachine64() argument
98 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { in NVPTXTargetMachine64()
|
| D | NVPTXTargetMachine.h | 53 Reloc::Model RM, CodeModel::Model CM,
109 Reloc::Model RM, CodeModel::Model CM,
118 Reloc::Model RM, CodeModel::Model CM,
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsTargetMachine.cpp | 41 Reloc::Model RM, CodeModel::Model CM, in MipsTargetMachine() argument
44 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in MipsTargetMachine()
64 Reloc::Model RM, CodeModel::Model CM, in MipsebTargetMachine() argument
66 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in MipsebTargetMachine()
73 Reloc::Model RM, CodeModel::Model CM, in MipselTargetMachine() argument
75 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in MipselTargetMachine()
|
| D | MipsTargetMachine.h | 45 Reloc::Model RM, CodeModel::Model CM,
90 Reloc::Model RM, CodeModel::Model CM,
101 Reloc::Model RM, CodeModel::Model CM,
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTargetMachine.cpp | 38 Reloc::Model RM, CodeModel::Model CM, in PPCTargetMachine() argument
41 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in PPCTargetMachine()
58 Reloc::Model RM, CodeModel::Model CM, in PPC32TargetMachine() argument
60 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { in PPC32TargetMachine()
68 Reloc::Model RM, CodeModel::Model CM, in PPC64TargetMachine() argument
70 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { in PPC64TargetMachine()
|
| D | PPCTargetMachine.h | 43 Reloc::Model RM, CodeModel::Model CM,
80 Reloc::Model RM, CodeModel::Model CM,
91 Reloc::Model RM, CodeModel::Model CM,
|
| /external/llvm/lib/Target/X86/ |
| D | X86TargetMachine.cpp | 36 Reloc::Model RM, CodeModel::Model CM, in X86_32TargetMachine() argument
38 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false), in X86_32TargetMachine()
59 Reloc::Model RM, CodeModel::Model CM, in X86_64TargetMachine() argument
61 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true), in X86_64TargetMachine()
75 Reloc::Model RM, CodeModel::Model CM, in X86TargetMachine() argument
78 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in X86TargetMachine()
|
| D | X86TargetMachine.h | 42 Reloc::Model RM, CodeModel::Model CM,
91 Reloc::Model RM, CodeModel::Model CM,
120 Reloc::Model RM, CodeModel::Model CM,
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetMachine.cpp | 43 Reloc::Model RM, CodeModel::Model CM, in ARMBaseTargetMachine() argument
45 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in ARMBaseTargetMachine()
59 Reloc::Model RM, CodeModel::Model CM, in ARMTargetMachine() argument
61 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in ARMTargetMachine()
85 Reloc::Model RM, CodeModel::Model CM, in ThumbTargetMachine() argument
87 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in ThumbTargetMachine()
|
| D | ARMTargetMachine.h | 45 Reloc::Model RM, CodeModel::Model CM,
74 Reloc::Model RM, CodeModel::Model CM,
117 Reloc::Model RM, CodeModel::Model CM,
|
| /external/llvm/lib/Target/MBlaze/MCTargetDesc/ |
| D | MBlazeMCTargetDesc.cpp | 65 CodeModel::Model CM, in createMBlazeMCCodeGenInfo() argument
70 if (CM == CodeModel::Default) in createMBlazeMCCodeGenInfo()
71 CM = CodeModel::Small; in createMBlazeMCCodeGenInfo()
72 X->InitMCCodeGenInfo(RM, CM, OL); in createMBlazeMCCodeGenInfo()
|
| /external/llvm/lib/MC/ |
| D | MCCodeGenInfo.cpp | 18 void MCCodeGenInfo::InitMCCodeGenInfo(Reloc::Model RM, CodeModel::Model CM, in InitMCCodeGenInfo() argument
21 CMModel = CM; in InitMCCodeGenInfo()
|
| /external/clang/lib/StaticAnalyzer/Checkers/ |
| D | BoolAssignmentChecker.cpp | 81 ConstraintManager &CM = C.getConstraintManager(); in checkBind() local
99 llvm::tie(stateGE, stateLT) = CM.assumeDual(state, *greaterThanEqualToZero); in checkBind()
135 llvm::tie(stateLE, stateGT) = CM.assumeDual(state, *lessThanEqToOne); in checkBind()
|
| /external/llvm/include/llvm/Support/ |
| D | TargetRegistry.h | 78 CodeModel::Model CM,
92 CodeModel::Model CM,
287 CodeModel::Model CM, in createMCCodeGenInfo() argument
291 return MCCodeGenInfoCtorFn(Triple, RM, CM, OL); in createMCCodeGenInfo()
344 CodeModel::Model CM = CodeModel::Default,
349 RM, CM, OL);
875 CodeModel::Model CM, CodeGenOpt::Level OL) { in Allocator()
1046 CodeModel::Model CM, in Allocator()
1048 return new TargetMachineImpl(T, TT, CPU, FS, Options, RM, CM, OL); in Allocator()
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreTargetMachine.cpp | 26 Reloc::Model RM, CodeModel::Model CM, in XCoreTargetMachine() argument
28 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in XCoreTargetMachine()
|
| /external/clang/lib/CodeGen/ |
| D | BackendUtil.cpp | 265 llvm::CodeModel::Model CM; in AddEmitPasses() local
267 CM = llvm::CodeModel::Small; in AddEmitPasses()
269 CM = llvm::CodeModel::Kernel; in AddEmitPasses()
271 CM = llvm::CodeModel::Medium; in AddEmitPasses()
273 CM = llvm::CodeModel::Large; in AddEmitPasses()
276 CM = llvm::CodeModel::Default; in AddEmitPasses()
382 RM, CM, OptLevel); in AddEmitPasses()
|